SBASBC4 December   2025 ADS8688W

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Timing Diagrams
    9. 6.9 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Analog Inputs
      2. 7.3.2  Analog Input Impedance
      3. 7.3.3  Input Overvoltage Protection Circuit
      4. 7.3.4  Programmable Gain Amplifier (PGA)
      5. 7.3.5  Second-Order, Low-Pass Filter (LPF)
      6. 7.3.6  ADC Driver
      7. 7.3.7  Multiplexer (MUX)
      8. 7.3.8  Reference
        1. 7.3.8.1 Internal Reference
        2. 7.3.8.2 External Reference
      9. 7.3.9  Auxiliary Channel
        1. 7.3.9.1 Input Driver for the AUX Channel
      10. 7.3.10 ADC Transfer Function
      11. 7.3.11 Alarm Feature
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device Interface
        1. 7.4.1.1 Digital Pin Description
          1. 7.4.1.1.1 CS (Input)
          2. 7.4.1.1.2 SCLK (Input)
          3. 7.4.1.1.3 SDI (Input)
          4. 7.4.1.1.4 SDO (Output)
          5. 7.4.1.1.5 DAISY (Input)
          6. 7.4.1.1.6 RST / PD (Input)
        2. 7.4.1.2 Data Acquisition Example
        3. 7.4.1.3 Host-to-Device Connection Topologies
          1. 7.4.1.3.1 Daisy-Chain Topology
          2. 7.4.1.3.2 Star Topology
      2. 7.4.2 Device Modes
        1. 7.4.2.1 Continued Operation in the Selected Mode (NO_OP)
        2. 7.4.2.2 Frame Abort Condition (FRAME_ABORT)
        3. 7.4.2.3 STANDBY Mode (STDBY)
        4. 7.4.2.4 Power-Down Mode (PWR_DN)
        5. 7.4.2.5 Auto Channel Enable With Reset (AUTO_RST)
        6. 7.4.2.6 Manual Channel n Select (MAN_Ch_n)
        7. 7.4.2.7 Channel Sequencing Modes
        8. 7.4.2.8 Reset Program Registers (RST)
  9. Register Maps
    1. 8.1 Command Register Description
    2. 8.2 Program Register Description
      1. 8.2.1 Program Register Read/Write Operation
      2. 8.2.2 Program Register Map
        1. 8.2.2.1 Auto-Scan Sequencing Control Registers
          1. 8.2.2.1.1 Auto-Scan Sequence Enable Register (address = 01h)
          2. 8.2.2.1.2 Channel Power Down Register (address = 02h)
        2. 8.2.2.2 Alarm Flag Registers (Read-Only)
          1. 8.2.2.2.1 ALARM Overview Tripped-Flag Register (address = 10h)
          2. 8.2.2.2.2 Alarm Flag Registers: Tripped and Active (address = 11h to 14h)
          3. 8.2.2.2.3 Alarm Threshold Setting Registers
        3. 8.2.2.3 Device Features Selection Control Register (address = 03h)
        4. 8.2.2.4 Range Select Registers (addresses 05h-0Ch)
        5. 8.2.2.5 Command Read-Back Register (address = 3Fh)
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Phase-Compensated, 8-Channel, Multiplexed Data Acquisition System for Power Automation
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 78
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Channel Sequencing Modes

The devices offer two channel sequencing modes: AUTO_RST and MAN_Ch_n.

In AUTO_RST mode, the channel number automatically increments in every subsequent frame. As explained in the Auto-Scan Sequencing Control Registers section, the analog inputs can be selected for an automatic scan with a register setting. The device automatically scans only the selected analog inputs in ascending order. The unselected analog input channels can also be powered down for optimizing power consumption in this mode of operation. The auto-mode sequence can be reset at any time during an automatic scan (using the AUTO_RST command). When the reset command is received, the ongoing auto-mode sequence is reset and restarts from the lowest selected channel in the sequence.

In MAN_Ch_n mode, the same input channel is selected during every data conversion frame. The input command words to select individual analog channels in MAN_Ch_n mode are listed in Table 8-1. If a particular input channel is selected during a data frame, then the analog inputs on the same channel are sampled during the next data frame. Figure 7-38 shows the SDI command sequence for transitions from AUTO_RST to MAN_Ch_n mode.

ADS8688W Transitioning from AUTO_RST to MAN_Ch_n Mode  (Channels 0 and 5 are Selected for Auto Sequence)Figure 7-38 Transitioning from AUTO_RST to MAN_Ch_n Mode (Channels 0 and 5 are Selected for Auto Sequence)

Figure 7-39 shows the SDI command sequence for transitions from MAN_Ch_n to AUTO_RST mode. Note that each SDI command is executed on the next CS falling edge. A RST command can be issued at any instant during any channel sequencing mode, after which the device is placed into a default power-up state in the next data frame.

ADS8688W Transitioning from MAN_Ch_n to AUTO_RST Mode (Channels 0 and 5 are Selected for Auto Sequence)Figure 7-39 Transitioning from MAN_Ch_n to AUTO_RST Mode (Channels 0 and 5 are Selected for Auto Sequence)