SBASBC4 December   2025 ADS8688W

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Timing Diagrams
    9. 6.9 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Analog Inputs
      2. 7.3.2  Analog Input Impedance
      3. 7.3.3  Input Overvoltage Protection Circuit
      4. 7.3.4  Programmable Gain Amplifier (PGA)
      5. 7.3.5  Second-Order, Low-Pass Filter (LPF)
      6. 7.3.6  ADC Driver
      7. 7.3.7  Multiplexer (MUX)
      8. 7.3.8  Reference
        1. 7.3.8.1 Internal Reference
        2. 7.3.8.2 External Reference
      9. 7.3.9  Auxiliary Channel
        1. 7.3.9.1 Input Driver for the AUX Channel
      10. 7.3.10 ADC Transfer Function
      11. 7.3.11 Alarm Feature
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device Interface
        1. 7.4.1.1 Digital Pin Description
          1. 7.4.1.1.1 CS (Input)
          2. 7.4.1.1.2 SCLK (Input)
          3. 7.4.1.1.3 SDI (Input)
          4. 7.4.1.1.4 SDO (Output)
          5. 7.4.1.1.5 DAISY (Input)
          6. 7.4.1.1.6 RST / PD (Input)
        2. 7.4.1.2 Data Acquisition Example
        3. 7.4.1.3 Host-to-Device Connection Topologies
          1. 7.4.1.3.1 Daisy-Chain Topology
          2. 7.4.1.3.2 Star Topology
      2. 7.4.2 Device Modes
        1. 7.4.2.1 Continued Operation in the Selected Mode (NO_OP)
        2. 7.4.2.2 Frame Abort Condition (FRAME_ABORT)
        3. 7.4.2.3 STANDBY Mode (STDBY)
        4. 7.4.2.4 Power-Down Mode (PWR_DN)
        5. 7.4.2.5 Auto Channel Enable With Reset (AUTO_RST)
        6. 7.4.2.6 Manual Channel n Select (MAN_Ch_n)
        7. 7.4.2.7 Channel Sequencing Modes
        8. 7.4.2.8 Reset Program Registers (RST)
  9. 8 Register Maps
    1. 8.1 Command Register Description
    2. 8.2 Program Register Description
      1. 8.2.1 Program Register Read/Write Operation
      2. 8.2.2 Program Register Map
        1. 8.2.2.1 Auto-Scan Sequencing Control Registers
          1. 8.2.2.1.1 Auto-Scan Sequence Enable Register (address = 01h)
          2. 8.2.2.1.2 Channel Power Down Register (address = 02h)
        2. 8.2.2.2 Alarm Flag Registers (Read-Only)
          1. 8.2.2.2.1 ALARM Overview Tripped-Flag Register (address = 10h)
          2. 8.2.2.2.2 Alarm Flag Registers: Tripped and Active (address = 11h to 14h)
          3. 8.2.2.2.3 Alarm Threshold Setting Registers
        3. 8.2.2.3 Device Features Selection Control Register (address = 03h)
        4. 8.2.2.4 Range Select Registers (addresses 05h-0Ch)
        5. 8.2.2.5 Command Read-Back Register (address = 3Fh)
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Phase-Compensated, 8-Channel, Multiplexed Data Acquisition System for Power Automation
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 78
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

8.2.2 Program Register Map

This section provides a bit-by-bit description of each program register.

Table 8-4 Program Register Map
REGISTERREGISTER ADDRESS BITS[15:9]DEFAULT VALUE(1)BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0
AUTO SCAN SEQUENCING CONTROL
AUTO_SEQ_EN01hFFhCH7_EN(2)CH6_ENCH5_ENCH4_ENCH3_ENCH2_ENCH1_ENCH0_EN
Channel Power Down02h00hCH7_PDCH6_PDCH5_PDCH4_PDCH3_PDCH2_PDCH1_PDCH0_PD
DEVICE FEATURES SELECTION CONTROL
Feature Select03h00hDEV[1:0]0ALARM_EN00SDO [2:0]
RANGE SELECT REGISTERS
Channel 0 Input Range05h00h0000Range Select Channel 0[3:0]
Channel 1 Input Range06h00h0000Range Select Channel 1[3:0]
Channel 2 Input Range07h00h0000Range Select Channel 2[3:0]
Channel 3 Input Range08h00h0000Range Select Channel 3[3:0]
Channel 4 Input Range09h00h0000Range Select Channel 4[3:0]
Channel 5 Input Range0Ah00h0000Range Select Channel 5[3:0]
Channel 6 Input Range0Bh00h0000Range Select Channel 6[3:0]
Channel 7 Input Range0Ch00h0000Range Select Channel 7[3:0]
ALARM FLAG REGISTERS (Read-Only)
ALARM Overview Tripped-Flag10h00hTripped Alarm Flag Ch7Tripped Alarm Flag Ch6Tripped Alarm Flag Ch5Tripped Alarm Flag Ch4Tripped Alarm Flag Ch3Tripped Alarm Flag Ch2Tripped Alarm Flag Ch1Tripped Alarm Flag Ch0
ALARM Ch 0-3 Tripped-Flag11h00hTripped Alarm Flag Ch0 LowTripped Alarm Flag Ch0 HighTripped Alarm Flag Ch1 LowTripped Alarm Flag Ch1 HighTripped Alarm Flag Ch2 LowTripped Alarm Flag Ch2 HighTripped Alarm Flag Ch3 LowTripped Alarm Flag Ch3 High
ALARM Ch 0-3 Active-Flag12h00hActive Alarm Flag Ch0 LowActive Alarm Flag Ch0 HighActive Alarm Flag Ch1 LowActive Alarm Flag Ch1 HighActive Alarm Flag Ch2 LowActive Alarm Flag Ch2 HighActive Alarm Flag Ch3 LowActive Alarm Flag Ch3 High
ALARM Ch 4-7 Tripped-Flag13h00hTripped Alarm Flag Ch4 LowTripped Alarm Flag Ch4 HighTripped Alarm Flag Ch5 LowTripped Alarm Flag Ch5 HighTripped Alarm Flag Ch6 LowTripped Alarm Flag Ch6 HighTripped Alarm Flag Ch7 LowTripped Alarm Flag Ch7 High
ALARM Ch 4-7 Active-Flag14h00hActive Alarm Flag Ch4 LowActive Alarm Flag Ch4 HighActive Alarm Flag Ch5 LowActive Alarm Flag Ch5 HighActive Alarm Flag Ch6 LowActive Alarm Flag Ch6 HighActive Alarm Flag Ch7 LowActive Alarm Flag Ch7 High
ALARM THRESHOLD REGISTERS
Ch 0 Hysteresis15h00hCH0_HYST[5:0]00
Ch 0 High Threshold MSB16hFFhCH0_HT[13:6]
Ch 0 High Threshold LSB17hFChCH0_HT[5:0]00
Ch 0 Low Threshold MSB18h00hCH0_LT[13:6]
Ch 0 Low Threshold LSB19h00hCH0_LT[5:0]00
…………
See the Alarm Threshold Setting Registers for details regarding the ALARM threshold settings registers.
…
Ch 7 Hysteresis38h00hCH7_HYST[5:0]00
Ch 7 High Threshold MSB39hFFhCH7_HT[13:6]
Ch 7 High Threshold LSB3AhFChCH7_HT[5:0]00
Ch 7 Low Threshold MSB3Bh00hCH7_LT[13:6]
Ch 7 Low Threshold LSB3Ch00hCH7_LT[5:0]00
COMMAND READ BACK (Read-Only)
Command Read Back3Fh00hCOMMAND_WORD[7:0]
(1) All registers are reset to the default values at power-on or at device reset using the register settings method.
(2) Shading indicates bits or registers that are not included in the 4-channel version of the device. A write operation on any of these bits or registers has no effect on device behavior. A read operation on any of these bits or registers outputs all 1's on the SDO line.