SBAU433 November   2025

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specifications
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Analog Inputs
      1. 2.1.1 Differential Current Input Channels
      2. 2.1.2 Differential Voltage Inputs Channels
      3. 2.1.3 Combined Differential Current and Voltage Input Channels
      4. 2.1.4 Single-Ended Current Input Channels
    2. 2.2 ADC Connections and Decoupling
    3. 2.3 Digital Interface
    4. 2.4 Power Supplies
    5. 2.5 Voltage Reference
    6. 2.6 Clocking
    7. 2.7 Using the ADS125H18 EVM With an External Controller
  9. 3Software
    1. 3.1 Software Description
    2. 3.2 ADS125H18 GUI Installation
  10. 4Implementation Results
    1. 4.1 Hardware Connections
    2. 4.2 GUI Operation
      1. 4.2.1 ADC Capture Settings and Sequencer Configuration
      2. 4.2.2 EVM Register Settings
      3. 4.2.3 Time-Domain Display
      4. 4.2.4 Frequency-Domain Display
      5. 4.2.5 Histogram Display
  11. 5Hardware Design Files
    1. 5.1 Schematics
    2. 5.2 PCB Layouts
    3. 5.3 Bill of Materials (BOM)
  12. 6Additional Information
    1. 6.1 Trademarks

4.2.1 ADC Capture Settings and Sequencer Configuration

Figure 4-3 shows how the Pages control in the upper-left corner allows access to the other pages in the GUI. Navigate to any of the GUI pages using these controls. Figure 4-3 also shows the ADC Capture page. Use this page to easily configure the most important ADC settings, including the General Configuration and Step Configuration parameters, the sequencer mode, and the number of samples or sequences to capture.

ADS125H18EVM-PDK ADS125H18 EVM GUI ADC Capture Page - General Configuration Figure 4-3 ADS125H18 EVM GUI ADC Capture Page - General Configuration

The General Configuration tab allows to user to set certain parameters that are used for all steps, including the speed mode, the internal reference voltage, the state of the reference buffer, and the Test DAC range. Additionally, the user can enter the External Reference Voltage if applicable. Finally, the ADC Capture page reports the device attenuation by reading the ADC DEVICE_ID register.

The default option in the sequencer mode dropdown in Figure 4-3 allows the user to capture n conversions of a single step, where n is the number entered in the box in the lower left of the GUI. Alternatively, enable the sequencer to capture n complete sequences of all enabled steps.

Figure 4-4 shows the Step Configuration tab. Use these controls to configure the settings for each individual step. When the sequencer is disabled, only Step 0 is shown.

ADS125H18EVM-PDK ADS125H18 EVM GUI ADC Capture Page - Step Configuration Figure 4-4 ADS125H18 EVM GUI ADC Capture Page - Step Configuration

Table 4-1 explains in more detail each field shown in Figure 4-4:

Table 4-1 Understanding the Step Configuration Page Parameters

ITEM #

PARAMETER

DESCRIPTION

1

REF_SEL

Select the reference voltage source to be used with this step

2

AIN

Select the measurement channel for this step

3

SYS_MON

Select the system monitor option to be measured in this step

NOTE: the system monitor takes precedence over the AIN selection (see #2 above), and also uses the internal reference regardless of the selection in REF_SEL

4

OWCS

Enable or disable the open-wire current sources for this step

5

FLTR_OSR

Select the OSR for this step

NOTE: the data rate corresponding to this OSR is shown on the right (see #12 below)

6

FLTR_MODE

Select the filter mode for this step

7

NUM_CONV

Enter the number of conversions for this step

8

DELAY

Enter the programmable delay to be used for this step

NOTE: the delay value is measured in modulator clock periods (tMOD), is a 16-bit field, and is entered in hex

9

EVM I/V SWITCH

Select the state of the I/V switch on the EVM for this step

NOTE: this is a feature of the EVM, not the ADC. These switches are only installed on the EVM on differential channels AIN2/AIN3 and AIN4/AIN5, so this selection only affects those channels

10

TDAC_SEL

Select the location where the Test DAC voltage is output to in this step

11

TDAC_VAL

Enter the value of the Test DAC voltage to be used for this step

NOTE: the Test DAC value is some the reference voltage, is a 5-bit field, and must be entered in hex

12

Data Rate (SPS)

Data rate relative to the selected OSR (see #5 above), the clock frequency, and the clock mode

NOTE: the clock mode is selected on the General Config tab

13

Full Scale Voltage

Calculates the full-scale voltage (FSV) for this step, where FSV = Reference Voltage * Attenuation

NOTE: the reference voltage is set on the General Config tab, and the Attenuation factor is determined by reading the DEVICE_ID register

Enable the ADC sequencer by selecting "Sequencer enabled: continuous mode" from the SEQ_MODE dropdown. Multiple step options appear after selecting this configuration. Additionally, the Capture parameter changes from "Samples" to "Sequences". As a result, the GUI captures and displays the data for the desired number of sequences defined by the user. Figure 4-5 shows how the GUI changes after enabling the sequencer.

ADS125H18EVM-PDK ADS125H18 EVM GUI ADC Capture Page - Enable Sequencer Figure 4-5 ADS125H18 EVM GUI ADC Capture Page - Enable Sequencer

After enabling the sequencer, Figure 4-6 shows how clicking on each individual step opens up a new Step tab. Clicking on the same step again closes that step tab. This is true for all steps except Step 0, which cannot be disabled.

Configure each enabled step as shown in Figure 4-4 and described in Table 4-1.

ADS125H18EVM-PDK ADS125H18 EVM GUI ADC Capture Page - Enabling Multiple Sequence Steps Figure 4-6 ADS125H18 EVM GUI ADC Capture Page - Enabling Multiple Sequence Steps