SBAU433B November   2025  – April 2026

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specifications
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Analog Inputs
      1. 2.1.1 Differential Current Input Channels
      2. 2.1.2 Differential Voltage Inputs Channels
      3. 2.1.3 Combined Differential Current and Voltage Input Channels
      4. 2.1.4 Single-Ended Current Input Channels
    2. 2.2 ADC Connections and Decoupling
    3. 2.3 Digital Interface
    4. 2.4 Power Supplies
    5. 2.5 Voltage Reference
    6. 2.6 Clocking
    7. 2.7 Using the ADS125H18 EVM With an External Controller
  9. 3Software
    1. 3.1 Software Description
    2. 3.2 ADS125H18 GUI Installation
  10. 4Implementation Results
    1. 4.1 Hardware Connections
    2. 4.2 GUI Operation
      1. 4.2.1 ADC Capture Settings and Sequencer Configuration
      2. 4.2.2 Time-Domain Display
      3. 4.2.3 Frequency-Domain Display
      4. 4.2.4 Histogram Display
      5. 4.2.5 EVM Register Settings
  11. 5Hardware Design Files
    1. 5.1 Schematics
    2. 5.2 PCB Layouts
    3. 5.3 Bill of Materials (BOM)
  12. 6Additional Information
    1. 6.1 Trademarks
  13. 7Revision History

1.4 Device Information

This section introduces important information about the ADS125H18 device family. Table 1-2 describes some of the parameters and features that are common among all ADCs in the ADS125H18 device family, while Table 1-3 lists the key differences among the ADCs in the ADS125H18 device family. Refer to the ADS125H18 data sheet for complete device specifications.

Table 1-2 ADS125H18 Device Family Key Features and Parameters

PARAMETER

VALUE

Maximum data rate1.067MSPS

Input impedance

≥1MΩ

Integrated features

  • Flexible channel sequencer

  • FIFO buffer

  • Voltage reference

  • Oscillator

  • Test DAC

  • Fault detection

PackageVQFN-36
Package size5.00mm × 5.00mm
Specified temperature range-40°C ≤ TA ≤ 125°C
Table 1-3 ADC Options in the ADS125H18 Device Family

DEVICE

RESOLUTION

CHANNEL CONFIGURATION

(INPUT VOLTAGE RANGE)

HIGH VOLTAGE INPUT RANGE

ADS125H18V12

24 bit

16x high voltage channels

(see HIGH VOLTAGE INPUT RANGE column)

±12V

ADS125H18V20±20V
ADS125H18V40±40V
ADS115H18V12

16 bit

±12V
ADS115H18V20±20V
ADS115H18V40±40V
ADS125H14V12

24 bit

8x high voltage channels

(see HIGH VOLTAGE INPUT RANGE column)

8x low voltage channels

(≤AVDD)

±12V
ADS125H14V20±20V
ADS125H14V40±40V
ADS115H14V12

16 bit

±12V
ADS115H14V20±20V
ADS115H14V40±40V

The ADS125H18 EVM is provided with an ADS125H18V20 installed, while the ADS125H18 EVM GUI is intended to operate specifically with the ADS125H18V20. The user can replace the ADS125H18V20 with any device listed in Table 1-3; however, the user cannot use the ADS125H18 EVM GUI or PHI controller card if the user replaces the ADS125H18V20 already installed on the EVM. Refer to Section 2.7 for more information about using the ADS125H18 EVM with an external controller. The rest of this document assumes that the ADS125H18V20 is installed on the EVM, unless otherwise noted.

Figure 1-2 shows the block diagram for all input range options for the 16-bit ADS115H18 and 24-bit ADS125H18.

ADS125H18EVM-PDK ADS115H18 and ADS125H18 Block DiagramFigure 1-2 ADS115H18 and ADS125H18 Block Diagram