SBOA281A December   2018  – September 2024 OPA172 , TLV171

 

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  3.   Trademarks

Design Goals

Input ViDiff(Vi2 - Vi1) Output Supply
ViDiff_Min ViDiff_Max VoMin VoMax Vcc Vee Vref
+/–1V +/–2V –10V +10V 15V –15V 0V
Vcm Gain Range
+/-10V 5V/V to 10V/V

Design Description

This design amplifiers the difference between Vi1 and Vi2 and outputs a single ended signal while rejecting the common–mode voltage. Linear operation of an instrumentation amplifier depends upon the linear operation of its primary building block: op amps. An op amp operates linearly when the input and output signals are within the device’s input common–mode and output–swing ranges, respectively. The supply voltages used to power the op amps define these ranges.

Design Notes

  1. Rg sets the gain of the circuit.
  2. High–value resistors can degrade the phase margin of the circuit and introduce additional noise in the circuit.
  3. The ratio of R4 and R3 set the minimum gain when Rg is removed.
  4. Ratios of R2/R1 and R4/R3 must be matched to avoid degrading the instrumentation amplifier’s DC CMRR and ensuring the Vref gain is 1V/V.
  5. Linear operation is contingent upon the input common–mode and the output swing ranges of the discrete op amps used. The linear output swing ranges are specified under the Aol test conditions in the op amps data sheets.

Design Steps

  1. Transfer function of this circuit.
    V o = V i D i f f × G + V r e f = V i 2 - V i 1 × G + V r e f
    when
    V r e f = 0
    the transfer function simplifies to
    V o = V i 2 - V i 1 × G
    where G is the gain of the instrumentation amplifier and
    G = 1 + R 4 R 3 + 2 R 2 R g
  2. Select R4 and R3 to set the minimum gain.
    G min = 1 + R 4 R 3 = 5 V V Choose   R 4 = 20 G min = 1 + 20 R 3 = 5 V V R 3 = R 4 5 - 1 = 20 4 = 5 R 3 = 5 . 1   ( Standard   Value )
  3. Select R1 and R2. Ensure that R1/R2 and R3/R4 ratios are matched to set the gain applied to the reference voltage at 1V/V.
    V o _ ref Vref = - R 3 R 4 × - R 2 R 1 = R 3 × R 2 R 4 × R 1 = 1 V V R 2 R 1 = R 4 R 3 R 1 = R 3 = 5 . 1   and   R 2 = R 4 = 20   ( Standad   Value )
  4. Select Rg to meet the desired maximum gain G = 10V/V.
G = 1 + R 4 R 3 + 2 R 2 R g = 1 + 20  5.1  + 2 × 20  R g = 10  V / V R g = R g = 7.87    ( Standard   Value )

Design Simulations

DC Simulation Results

Transient Simulation Results

References

Texas Instruments, SBOMAU7 simulation file, software support

Texas Instruments, VCM vs. VOUT Plots for Instrumentation Amplifiers With Two Op Amps, analog design journal

Design Featured Op Amp

TLV171
Vss 4.5V to 36V
VinCM (Vee–0.1V) to (Vcc–2V)
Vout Rail–to–rail
Vos 0.25mV
Iq 475µA
Ib 8pA
UGBW 3MHz
SR 1.5V/µs
#Channels 1,2,4
TLV171

Design Alternate Op Amp

OPA172
Vss 4.5V to 36V
VinCM (Vee–0.1V) to (Vcc–2V)
Vout Rail–to–rail
Vos 0.2mV
Iq 1.6mA
Ib 8pA
UGBW 10MHz
SR 10V/µs
#Channels 1,2,4
OPA172