SBOS152B August   1987  – March 2025 INA106

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Gain Error and Drift
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
    3. 7.3 Additional Applications
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Examples
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 PSpice® for TI
        2. 8.1.1.2 TINA-TI (Free Software Download)
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

5.4 Electrical Characteristics

at TA = 25°C, VS = ±15V, RL = 10kΩ, VREF = 0V, and G = 10 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT
VOS Offset voltage RTI(1)(2) 50 200 µV
Offset voltage drift TA = –40°C to +85°C, RTI(1)(2) 0.2 µV/℃
PSRR Power-supply rejection ratio RTI(1)(2), VS = ±6V to ±18V 1 10 µV/V
Long-term stability 10 µV/mo
ZIN-DM Differential impedance (3) 10 kΩ
ZIN-CM Common-mode impedance(3) 110 kΩ
VCM Operating common-mode input voltage(4) –11 11 V
VDM Operating differential-mode input voltage(4) –1 1 V
CMRR Common-mode rejection ratio(5) TA = –40°C to +125°C 86 100 dB
NOISE VOLTAGE
eN Voltage noise RTI(1)(6) fO = 10kHz 30 nV/√Hz
fB = 0.01Hz to 10Hz 1.5 µVPP
GAIN
G Initial gain 10 V/V
GE Gain error ±0.01 ±0.025 %
Gain drift –4 ppm/°C
Gain nonlinearity 0.0002 0.001 % of FSR
OUTPUT
Output voltage IO = –5mA, 20mA 10 12 V
Load capacitance stability 1000 pF
ISC Sourcing Continuous to VS / 2 40 to 70 mA
Sinking 10 to 70 mA
ZO Output Impedance 0.01 Ω
FREQUENCY RESPONSE
BW Bandwidth, –3dB 0.5 MHz
FPBW Full Power Bandwidth, –3dB VO = 20Vpp 300 400 kHz
SR Slew rate 2 3 V/µs
tS Settling time 0.1%, VSTEP = 10V 5 µs
0.01%, VSTEP = 10V 10 µs
0.01%, VCM-STEP = 10V, VDIFF = 0V 5 µs
POWER SUPPLY
IQ Quiescent current VO = 0V ±1.5 ±2 mA
(1) Referred to input in difference configuration. 
(2) Includes effects of amplifier's input bias and offset currents.
(3) 25kΩ resistors are ratio matched but have ±20% absolute value.
(4) Maximum input voltage without protection is 10V more than either ±15V supply (±25V). Limit IIN to 1mA.
(5) With zero source impedance.
(6) Includes effects of amplifier's input current noise and thermal noise contribution of resistor network.