SBOS556D June   2011  – August 2020 OPA171-Q1 , OPA2171-Q1 , OPA4171-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions : OPA171-Q1 and OPA2171-Q1
    2.     Pin Functions : OPA4171-Q1
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information — OPA171-Q1 and OPA2171-Q1
    5. 6.5 Thermal Information — OPA4171-Q1
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
      1. 6.7.1 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operating Characteristics
      2. 7.3.2 Phase-Reversal Protection
      3. 7.3.3 Capacitive Load and Stability
    4. 7.4 Device Functional Modes
      1. 7.4.1 Common-Mode Voltage Range
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Electrical Overstress
    2. 8.2 Typical Application
      1. 8.2.1 Capacitive Load Drive Solution Using an Isolation Resistor
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

8.2.1.2 Detailed Design Procedure

Figure 8-3 shows a unity-gain buffer driving a capacitive load. Equation 1 shows the transfer function for the circuit in Figure 8-3. Not shown in Figure 8-3 is the open-loop output resistance of the op amp, Ro.

Equation 1. GUID-47E65001-FC75-40CF-A03B-27B5FBD9A7A8-low.gif

The transfer function in Equation 1 has a pole and a zero. The frequency of the pole (fp) is determined by (Ro + RISO) and CLOAD. Components RISO and CLOAD determine the frequency of the zero (fz). A stable system is obtained by selecting RISO such that the rate of closure (ROC) between the open-loop gain (AOL) and 1/β is 20 dB/decade. Figure 8-3 shows the concept. The 1/β curve for a unity-gain buffer is 0 dB.

GUID-6ED62CAA-7785-469B-BDBD-706C6A58803D-low.gifFigure 8-3 Unity-Gain Amplifier with RISO Compensation

ROC stability analysis is typically simulated. The validity of the analysis depends on multiple factors, especially the accurate modeling of Ro. In addition to simulating the ROC, a robust stability analysis includes a measurement of overshoot percentage and AC gain peaking of the circuit using a function generator, oscilloscope, and gain and phase analyzer. Phase margin is then calculated from these measurements. Table 8-1 lists the overshoot percentage and AC gain peaking that correspond to phase margins of 45° and 60°. For more details on this design and other alternative devices that can be used in place of the OPA171-Q1 , see Capacitive Load Drive Solution using an Isolation Resistor.

Table 8-1 Phase Margin versus Overshoot and AC Gain Peaking
PHASE MARGINOVERSHOOTAC GAIN PEAKING
45°23.3%2.35 dB
60°8.8%0.28 dB