SBOU282A December   2022  – March 2023 OPA928

 

  1.   Abstract
  2.   Trademarks
  3. 1Read This First
    1. 1.1 EVM Cleanliness Guidelines
  4. 2Overview
    1. 2.1 Guarding and Shielding
  5. 3Getting Started
    1. 3.1 Related Documentation From Texas Instruments
    2. 3.2 Electrostatic Discharge Caution
  6. 4EVM Circuit Description
    1. 4.1 High-Impedance Amplifier Circuit
    2. 4.2 Transimpedance Amplifier Circuit
      1. 4.2.1 Configure the TIA
      2. 4.2.2 TIA Functions
        1. 4.2.2.1 T-Switch
        2. 4.2.2.2 Guarded Diode Limiter
  7. 5Cleaning the EVM
    1. 5.1 Ultrasonic Wash
    2. 5.2 Manual Cleaning Procedure
  8. 6Schematic, PCB Layout, and Bill of Materials
    1. 6.1 EVM Schematic
    2. 6.2 PCB Layout
    3. 6.3 Bill of Materials

Overview

The OPA928 is a 16-V, femtoampere input-bias-current operational amplifier (op amp) optimized for extremely low current and high-impedance applications. The internally guarded ESD structure and special package pinout isolates the amplifiers inputs from the output and power supply pins. The internal guard buffer is accessible through the guard pin, allowing the guard structure to be extended to the input traces and feedback components.

The OPA928EVM is a four-layer PCB using a hybrid stack-up of Rogers 4350B and FR-4. The EVM uses advanced guarding and shielding techniques to maintain femtoampere-level PCB layout performance. Both high-impedance (Hi-Z) buffer (see Section 4.1) and transimpedance amplifier (TIA, see Section 4.2) configurations are featured to evaluate the OPA928 in common application circuits. These configurations are separated into two independent circuits on the board. By default, 0-Ω resistor Rgnd is populated on the bottom of the board, connecting the analog ground of the two circuits.

The two OPA928 amplifiers, U1 and U2, are located on the bottom side of the EVM and are enclosed within grounded RF shields to protect from contamination, noise, and electromagnetic interference (EMI). The top side of the EVM features a variety of pin sockets, jumpers, and other components that provide easy configuration, while limiting the potential for performance-degrading contamination at sensitive nodes.