SBVS054K
November 2004 – June 2025
TPS730
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagrams
6.3
Feature Description
6.3.1
Undervoltage Lockout (UVLO)
6.3.2
Shutdown
6.3.3
Foldback Current Limit
6.4
Device Functional Modes
6.4.1
Normal Operation
6.4.2
Dropout Operation
6.4.3
Disabled
7
Application and Implementation
7.1
Application Information
7.1.1
Adjustable Operation
7.1.2
Capacitor Recommendations
7.1.3
Input and Output Capacitor Requirements
7.1.4
Noise-Reduction and Feed-Forward Capacitor Requirements
7.1.5
Reverse Current Operation
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.3
Application Curves
7.3
Best Design Practices
7.4
Power Supply Recommendations
7.5
Layout
7.5.1
Layout Guidelines
7.5.1.1
Board Layout Recommendations to Improve PSRR and Noise Performance
7.5.1.2
Thermal Considerations
7.5.1.3
Power Dissipation
7.5.2
Layout Examples
8
Device and Documentation Support
8.1
Device Support
8.1.1
Development Support
8.1.1.1
Spice Models
8.1.2
Device Nomenclature
8.2
Documentation Support
8.2.1
Related Documentation
8.3
Receiving Notification of Documentation Updates
8.4
Support Resources
8.5
Trademarks
8.6
Electrostatic Discharge Caution
8.7
Glossary
9
Revision History
10
Mechanical, Packaging, and Orderable Information
10.1
TPS730YZQ Nanostar™ Wafer Chip Scale Information
7.2.3
Application Curves
Figure 7-4
TPS730 Output Voltage, Enable Voltage vs Time (Start-Up)
Figure 7-6
TPS730 Load Transient Response
Figure 7-5
TPS730 Line Transient Response