SBVS300B November   2016  – June 2025 TPS3851

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Timing Diagrams
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 RESET
      2. 6.3.2 Manual Reset MR
      3. 6.3.3 UV Fault Detection
      4. 6.3.4 Watchdog Mode
        1. 6.3.4.1 CWD
        2. 6.3.4.2 Watchdog Input WDI
        3. 6.3.4.3 Watchdog Output WDO
        4. 6.3.4.4 SET1
    4. 6.4 Device Functional Modes
      1. 6.4.1 VDD is Below VPOR ( VDD < VPOR)
      2. 6.4.2 Above Power-On-Reset, But Less Than VDD(min) (VPOR ≤ VDD < VDD(min))
      3. 6.4.3 Normal Operation (VDD ≥ VDD(min))
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 CWD Functionality
        1. 7.1.1.1 Factory-Programmed Timing Options
        2. 7.1.1.2 Adjustable Capacitor Timing
      2. 7.1.2 Overdrive Voltage
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Monitoring the 1.8V Rail
        2. 7.2.2.2 Calculating RESET and WDO Pullup Resistor
        3. 7.2.2.3 Setting the Watchdog
        4. 7.2.2.4 Watchdog Disabled During Initialization Period
      3. 7.2.3 Glitch Immunity
      4. 7.2.4 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

6.3.3 UV Fault Detection

The TPS3851 features undervoltage detection for common rails between 1.8V and 5V. The voltage is monitored on the input rail of the device. If VDD drops below VITN, then RESET is asserted (driven low). When VDD is above VITN + VHYST, RESET deasserts after tRST, as shown in Figure 6-1. The internal comparator has built-in hysteresis that provides some noise immunity and stable operation. Although not required in most cases, for noisy applications, good analog design practice is to place a 1nF to 100nF bypass capacitor close to the VDD pin to reduce sensitivity to transient voltages on the monitored signal.

TPS3851 Undervoltage DetectionFigure 6-1 Undervoltage Detection