SBVS393B December   2020  – November 2022 TPS7A43

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 MID_OUT Voltage Selection
      2. 7.3.2 Precision Enable
      3. 7.3.3 Dropout Voltage
      4. 7.3.4 Current Limit
      5. 7.3.5 Thermal Shutdown
      6. 7.3.6 Power Good
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device Functional Mode Comparison
      2. 7.4.2 Normal Operation
      3. 7.4.3 Dropout Operation
      4. 7.4.4 Disabled
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 MID_OUT Voltage Setting
      2. 8.1.2 Adjustable Device Feedback Resistors
      3. 8.1.3 Recommended Capacitor Types
      4. 8.1.4 Input and Output Capacitor Requirements
      5. 8.1.5 Power Dissipation (PD)
      6. 8.1.6 Estimating Junction Temperature
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Examples
  9. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 Evaluation Modules
        2. 9.1.1.2 Spice Models
      2. 9.1.2 Device Nomenclature
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

3 Description

The TPS7A43 low-dropout (LDO) linear voltage regulator introduces a combination of a 4-V to 85-V input voltage range with very-low quiescent current.

This device can support a wide range of input voltages (for example, a 15-s battery and 24-V to
48-V line power) and withstand line transient voltages up to 85 V. These features help modern applications meet increasingly stringent energy requirements, and help extend battery life in portable-power solutions.

The TPS7A43 output (OUT) is available in both fixed and adjustable output versions, which can regulate from 1.24 V to 14.5 V at 1% accuracy. The device also provides a second intermediate output (MID_OUT) that can be set to 10 V, 12 V, and 15 V using the MVSEL pins and can be used to bias gate drivers in place of a discrete regulator.

The TPS7A43 features a precision enable input that helps enable or disable the LDO at a fixed and accurate threshold voltage using a resistor divider from the input.

The power-good (PG) output is used to monitor the voltage at the feedback pin to indicate the status of the output voltage. The EN input and PG output can be used for sequencing multiple power sources in the system.

Package Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
TPS7A43 DGQ (HVSSOP, 10) 3.00 mm × 3.00 mm
(1) For all available packages, see the package option addendum at the end of the data sheet.
Typical Application Circuit
GUID-20220328-SS0I-3SSN-RGTR-BWMRWZ3ZCXKQ-low.gifLine Transient With VMID_OUT = 12 V, VOUT = 3.3 V, IOUT = 50 mA