VIN = VOUT(NOM) + 0.3V or 1.6V (whichever is greater), VOUT = 4.1V, IOUT = 1mA, CIN = 1µF, COUT = 1µF, and TA = 25°C (unless otherwise noted)
Figure 5-1 Line Regulation vs VIN
Figure 5-3 Load Regulation vs IOUT
Figure 5-5 Output Voltage Accuracy vs IOUT
Figure 5-7 Dropout Voltage vs IOUT
Figure 5-9 I GND vs VIN
Figure 5-11 IGND vs IOUT
Figure 5-13 Shutdown Current vs VIN
Figure 5-15 Enable Pin Leakage Current vs
VEN – VIN
Figure 5-17 Enable Logic High Threshold vs Temperature
| IOUT = 1mA to 75mA, tRISING = 75ns |
| IOUT = 0mA to 75mA, tRISING = 75ns |
| VIN = 4.4V → 5.4V → 4.4V, VIN tRISING = 5µs, IOUT = 75mA |
Figure 5-25 PSRR vs Frequency and VIN
Figure 5-27 PSRR vs Frequency and IOUT
Figure 5-29 PSRR vs Frequency and COUT
| IOUT = 20mA, VRMS BW = 10Hz to 100kHz |
| IOUT = 20mA, VRMS BW = 10Hz to 100kHz |
Figure 5-35 Noise vs Frequency and IOUT
| VIN = 0V to 4.4V, VEN = 0V to 3.6V, VEN rises 500µs behind VIN, VIN and VEN slew rate = 1V/µs |
VIN = 4.4V, VEN = 0V to 3.6V, VEN slew rate = 1V/µs,
COUT = 1µF |
Figure 5-2 Load Regulation vs IOUT
Figure 5-4 Output Voltage Accuracy vs IOUT
Figure 5-6 Output Voltage Accuracy vs VIN
Figure 5-8 Dropout Voltage vs IOUT
Figure 5-10 IGND vs VIN
Figure 5-12 IGND vs IOUT
Figure 5-14 Shutdown Current vs VIN
Figure 5-16 UVLO Threshold vs Temperature
Figure 5-18 Enable Logic Low Threshold Low vs Temperature
| IOUT = 75mA to 1mA, tFALLING = 75ns |
| IOUT = 75mA to 0mA, tFALLING = 75ns |
| VIN = 4.4V → 5.4V → 4.4V, VIN tRISING = 5µs, IOUT = 1mA |
Figure 5-26 PSRR vs Frequency and VIN
Figure 5-28 PSRR vs Frequency and COUTFigure 5-30 Noise vs Frequency and IOUT 
| IOUT = 75mA, VRMS BW = 10Hz to 100kHz |
| IOUT = 75mA, VRMS BW = 10Hz to 100kHz |
| From VEN = VEN(HI) to VOUT = 95% of VOUT(NOM), IOUT = 0mA |
| |
| VIN = 0V to 4.4V, VEN = 0V to 3.6V, VEN rises 500µs ahead of VIN, VIN and VEN slew rate = 1V/µs |
VIN = 4.4V, VEN = 0V to 3.6V, VEN slew rate = 1V/µs,
COUT = 200µF |