SCASE52 January   2025 SN74LV8T9541-EP

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Balanced CMOS 3-State Outputs
      2. 7.3.2 LVxT Enhanced Input Voltage
        1. 7.3.2.1 Up Translation
        2. 7.3.2.2 Down Translation
      3. 7.3.3 Clamp Diode Structure
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
    3. 8.3 Design Requirements
      1. 8.3.1 Power Considerations
      2. 8.3.2 Input Considerations
      3. 8.3.3 Output Considerations
    4. 8.4 Detailed Design Procedure
      1. 8.4.1 Application Curve
    5. 8.5 Power Supply Recommendations
    6. 8.6 Layout
      1. 8.6.1 Layout Guidelines
      2. 8.6.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

5.5 Electrical Characteristics

over operating free-air temperature range; typical ratings measured at TA = 25°C (unless otherwise noted).
PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT
VT+ Positive-going input threshold voltage 1.2V to 1.3V 0.31 0.655 1.1 V
1.65V to 2V 0.39 0.915 1.32
2.25V to 2.75V 0.51 1.09 1.51
3V to 3.6V 0.65 1.2 1.7
4.5V to 5.5V 0.87 1.51 2.16
VT- Negative-going input threshold voltage 1.2V to 1.3V 0.11 0.349 0.60 V
1.65V to 2V 0.18 0.455 0.63
2.25V to 2.75V 0.25 0.545 0.74
3V to 3.6V 0.33 0.635 0.85
4.5V to 5.5V 0.45 0.755 1.14
ΔVT Hysteresis (VT+ − VT−) 1.2V to 1.3V 0.20 0.29 0.77 V
1.65V to 2V 0.21 0.43 0.88
2.25V to 2.75V 0.25 0.54 0.91
3V to 3.6V 0.31 0.63 0.91
4.5V to 5.5V 0.43 0.75 1.05
VOH IOH = -50μA 1.2V to 5.5V VCC-0.2 V
IOH = -1mA 1.2V 0.8
IOH = -2mA 1.65V to 2V 1.21 1.7(1)
IOH = -3mA 2.25V to 2.75V 1.93 2.4(1)
IOH = -5.5mA 3V to 3.6V 2.49 3.08(1)
IOH = -8mA 4.5V to 5.5V 3.95 4.65(1)
IOH= –24mA 4.5V to 5.5V 3.15
VOL IOL= 50μA 1.2V to 5.5V 0.1 V
IOL = 1mA 1.2V 0.2
IOL = 2mA 1.65V to 2V 0.1(1) 0.25
IOL = 3mA 2.25V to 2.75V 0.1(1) 0.2
IOL = 5.5mA 3V to 3.6V 0.2(1) 0.25
IOL= 8mA 4.5V to 5.5V 0.3(1) 0.35
IOL= 24mA 4.5V to 5.5V 0.75
II VI = 0V or VCC 0V to 5.5V ±0.1 ±1 µA
ICC VI = VCC or GND, IO = 0 1.8V to 5.5V 2 20 µA
ΔICC One input at 0.3V or 3.4V, other inputs at 0 or VCC, IO = 0 5.5V 1.35 1.5 mA
One input at 0.3V or 1.1V, other inputs at 0 or VCC, IO = 0 1.8V 68 µA
CI VI = VCC or GND 5V 3 5 pF
CO VO = VCC or GND 5V 5 8 pF
IOZ VO = VCC or GND and VCC = 5.5V 5.5V ±2.5 µA
CPD(2)(3) CL = 50pF, F = 10MHz 1.8V to 5.5V 200 pF
(1) Typical value at nearest nominal voltage (1.8V, 2.5V, 3.3V, and 5V)
(2) CPD is used to determine the dynamic power consumption, per channel.
(3) PD= VCC2xFIx(CPD+ CL) where FI= input frequency, CL= output load capacitance, VCC= supply voltage.