SCASE95 June   2025 SN74LVC1G37-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Open-Drain CMOS Outputs
      2. 7.3.2 CMOS Schmitt-Trigger Inputs
      3. 7.3.3 Clamp Diode Structure
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
    3. 8.3 Design Requirements
      1. 8.3.1 Power Considerations
      2. 8.3.2 Input Considerations
      3. 8.3.3 Output Considerations
      4. 8.3.4 Detailed Design Procedure
    4. 8.4 Application Curves
    5. 8.5 Power Supply Recommendations
    6. 8.6 Layout
      1. 8.6.1 Layout Guidelines
      2. 8.6.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Description

The SN74LVC1G37-Q1 device is a Buffer with a Schmitt-Trigger input and an Open-Drain output.

Package Information
PART NUMBERPACKAGE(1)PACKAGE SIZE(2)BODY SIZE(3)
SN74LVC1G37-Q1DBV (SOT-23, 5)2.9mm × 2.8mm2.9mm × 1.6mm
DCK (SOT-SC70, 5) 2mm × 2.1mm 2mm × 1.25mm
For more information, see Section 11.
The package size (length × width) is a nominal value and includes pins, where applicable.
The body size (length × width) is a nominal value and does not include pins.
SN74LVC1G37-Q1 Logic Diagram Logic Diagram