SCES637D
August 2005 – May 2026
SN74LVCH8T245
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Switching Characteristics: VCCA = 1.8V ± 0.15V
5.7
Switching Characteristics: VCCA = 2.5V ± 0.2V
5.8
Switching Characteristics: VCCA = 3.3V ± 0.3V
5.9
Switching Characteristics: VCCA = 5V ± 0.5V
5.10
Operating Characteristics
5.11
Typical Characteristics
6
Parameter Measurement Information
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Fully Configurable Dual-Rail Design
7.3.2
Partial-Power-Down Mode Operation
7.3.3
Glitch-free Power Supply Sequencing
7.3.4
Active Bus Hold Circuitry
7.3.5
Balanced High-Drive CMOS Push-Pull Outputs
7.3.6
VCC Isolation and VCC Disconnect
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Enable Times
8.2.3
Application Curve
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Documentation Support
9.1.1
Related Documentation
9.2
Receiving Notification of Documentation Updates
9.3
Support Resources
9.4
Trademarks
9.5
Electrostatic Discharge Caution
9.6
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
5.2
ESD Ratings
VALUE
UNIT
V
(ESD)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
±4000
V
Charged-device model (CDM), per JEDEC specification JESD22-C101
(2)
±1000
(1)
JEDEC document JEP155 states that 500V HBM allows safe manufacturing with a standard ESD control process.
(2)
JEDEC document JEP157 states that 250V CDM allows safe manufacturing with a standard ESD control process.