SCES996 May   2025 TXG4020-Q1 , TXG4021-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Electrical Characteristics
    5. 5.5 Switching Characteristics, VCCA = 1.8 ± 0.15V
    6. 5.6 Switching Characteristics, VCCA = 2.5 ± 0.2V
    7. 5.7 Switching Characteristics, VCCA = 3.3 ± 0.3V
    8. 5.8 Switching Characteristics, VCCA = 5.0 ± 0.5V
    9. 5.9 Switching Characteristics: Tsk, TMAX
  7. 6 Parameter Measurement Information
    1. 6.1 Load Circuit and Voltage Waveforms
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 CMOS Schmitt-Trigger Inputs with Integrated Pulldowns
        1. 7.3.1.1 Inputs with Integrated Static Pull-Down Resistors
      2. 7.3.2 Balanced High-Drive CMOS Push-Pull Outputs
      3. 7.3.3 VCC Disconnect
      4. 7.3.4 Over-Voltage Tolerant Inputs
      5. 7.3.5 Glitch-Free Power Supply Sequencing
      6. 7.3.6 Negative Clamping Diodes
      7. 7.3.7 Fully Configurable Dual-Rail Design
      8. 7.3.8 Supports High-Speed Translation
      9. 7.3.9 AC Noise Rejection
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Regulatory Requirements
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

8.2.1 Design Requirements

Use the parameters listed in Table 8-1 for this design example.

Table 8-1 Design Parameters
DESIGN PARAMETERSEXAMPLE VALUES
Input voltage range1.71V to 5.5V
Output voltage range1.71V to 5.5V