SCHS240D November   1998  – October 2024 CD54AC164 , CD54ACT164 , CD74AC164 , CD74ACT164

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Description
  4. 3 Pin Configuration and Functions
  5. 4 Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 ESD Ratings
    3. 4.3 Recommended Operating Conditions
    4. 4.4 Thermal Information
    5. 4.5 DC Electrical Specifications
    6. 4.6 Prerequisite for Switching Function
    7. 4.7 Switching Specifications
  6. 5 Parameter Measurement Information
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Standard CMOS Inputs
      2. 6.3.2 TTL-Compatible CMOS Inputs
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
        1. 7.2.1.1 Power Considerations
        2. 7.2.1.2 Input Considerations
        3. 7.2.1.3 Output Considerations
        4. 7.2.1.4 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support (Analog)
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

4.6 Prerequisite for Switching Function

PARAMETER VCC (V) -40°C TO 85°C -55°C TO 125°C UNITS
MIN MAX MIN MAX
AC TYPES
fMAX Max. Clock Frequency 1.5 7 - 6 - MHz
3.3(1) 62 - 54 - MHz
5(2) 86 - 75 - MHz
tW MR Pulse Width 1.5 49 - 56 - ns
3.3 5.5 - 6.3 - ns
5 3.9 - 4.5 - ns
tW CP Pulse Width 1.5 73 - 84 - ns
3.3 8.2 - 9.4 - ns
5 5.9 - 6.7 - ns
tSU Set-up Time 1.5 27 - 31 - ns
3.3 3.1 - 3.5 - ns
5 2.2 - 2.5 - ns
tH Hold Time 1.5 27 - 31 - ns
3.3 3.1 - 3.5 - ns
5 2.2 - 2.5 - ns
tREM MR to CP Removal Time 1.5 1 - 1 - ns
3.3 1 - 1 - ns
5 1 - 1 - ns
ACT TYPES
fMAX Max. Clock Frequency 5(2) 80 - 70 - MHz
tW MR Pulse Width 5 3.9 - 4.5 - ns
tW CP Pulse Width 5 6.2 - 7.1 - ns
tSU Set-up Time 5 2.2 - 2.5 - ns
tH Hold Time 5 2.6 - 3 - ns
tREM MR to CP Removal Time 5 0 - 0 - ns
(1) 9. 3.3V Min at 3.6V, Max at 3V.
(2) 10. 5V Min at 5.5V, Max at 4.5V.