SCHS469 March   2025 CD4053B-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics - CD4053B-Q1
    6. 5.6 AC Performance Characteristics - CD4053B-Q1
    7. 5.7 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

5.4 Thermal Information

THERMAL METRIC(1)CD4053B-Q1UNIT
D (SOIC)PW (TSSOP)
16 PINS16 PINS
RθJA Junction-to-ambient thermal resistance 86.7116.5°C/W
RθJC(top)Junction-to-case (top) thermal resistance47.347.2°C/W
RθJBJunction-to-board thermal resistance45.363.0°C/W
ΨJTJunction-to-top characterization parameter12.16.4°C/W
ΨJBJunction-to-board characterization parameter44.962.1°C/W
RθJC(bot)Junction-to-case (bottom) thermal resistanceN/AN/A°C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.