SDAA405 July   2026

 

  1.   1
  2.   Trademarks
  3. 1Introduction
  4. 2Detection Methods
  5. 3IEC 62116 Test Setup and Procedure
  6. 4Summary
  7. 5References

3 IEC 62116 Test Setup and Procedure

IEC 62116 titled "Utility-Interconnected Photovoltaic Inverters – Test Procedure of Islanding Prevention Measures," defines a standardized and repeatable procedure for evaluating the anti-islanding performance of photovoltaic (PV) inverters. An equipment that meets the requirements of IEC 62116 can be classified as non-islanding, meaning it is capable of detecting an islanding condition and promptly ceasing to energize the grid under all applicable operating conditions. This section describes the test setup and methodology defined by the standard.

Test Circuit and Components

The IEC 62116 test circuit simulates real-world grid conditions with precise control over power flow and load balance. Its primary goal is to replicate the worst-case scenario for anti-islanding detection, where the inverter's output closely matches the connected load.

Key Components:

  • EUT (Equipment Under Test): Typically a PV inverter, connected between a DC source and an AC source representing the grid
  • Adjustable RLC load network: Connected in parallel on the AC side, allowing fine-tuned load balancing
  • Measuring instruments to monitor voltage, current, and power flow in real time

An example of the test setup with TIDA-010938 can be seen in Figure 3-1.

Anti-islanding Testing of TIDA-010938 Figure 3-1 Anti-islanding Testing of TIDA-010938

What the Setup Enables:

  • Simulation of balanced and imbalanced power conditions
  • Controlled grid switching (simulating grid disconnection)
  • Monitoring of the inverter's islanding detection response time

Test Procedure

IEC 62116 provides a standardized method to evaluate anti-islanding performance in PV inverters across three output power conditions:
  • Condition A: Maximum output
  • Condition B: 50–66% of maximum
  • Condition C: 25–33% of maximum

This can be seen in Table 3-1.

Table 3-1 Trial Conditions
Trial Inverter Output Power Inverter Input Voltage (VDC) Shutdown Settings
A Nominal >90% Nominal Nominal V & f shutdown
B 50-66% Nominal 50% Nominal, +/-10% Nominal V & f shutdown
C 25-33% Nominal <10% Nominal Nominal V & f shutdown
  • The test uses an RLC load tuned to a quality factor of Qf = 1.0 +/- 0.05, simulating the worst-case balanced island. The load is balanced so that current through the grid switch S1 is 0 A (+/-1% rated current), representing a perfect power match between inverter output and local load. The islanding test is triggered by opening S1, and the run-on time is recorded until the inverter output current is zero.
  • Load imbalances are then applied across the test conditions defined by the standard. This includes varying the active load and/or one reactive component (either L or C); the test is repeated after each adjustment, and the run-on time is recorded. Detailed information regarding the test conditions for power unbalance for Trials A, B and C can be found in the IEC-62116 standard.
  • Pass/Fail Criterion: Run-on time< 2 seconds for all tested conditions.

To evaluate the anti-islanding performance under demanding operating conditions, the TIDA-010938 was tested against the worst-case scenarios defined by IEC 62116 for Trials A, B, and C, without load imbalancing. The detailed test results and analysis are provided in the design guide.