SDAA476 July   2026 AM13E23019

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 TI AM13E230x Introduction
    2. 1.2 AI Toolchain for TI MCU Introduction
  5. 2Detailed Description
    1. 2.1 Sysconfig Settings for EPI
      1. 2.1.1 Refresh Count
      2. 2.1.2 EPI Clock Divider
    2. 2.2 AI Model Library Deployment for External SRAM Execution
      1. 2.2.1 Step 1: Add the AI “.a” File to the CCS Project
      2. 2.2.2 Step 2: Linker Script Change (`linker_m33_ti_arm_clang.cmd`)
      3. 2.2.3 'main.c' Changes
        1. 2.2.3.1 Include Headers
        2. 2.2.3.2 Declare Linker-Generated Symbols
        3. 2.2.3.3 memcpy Function
        4. 2.2.3.4 Place the Entry Function in the SDRAM Section
        5. 2.2.3.5 main() Boot Sequence
      4. 2.2.4 Step 4: CSS Project Validation
    3. 2.3 H/W Design Best Practices
  6. 3Summary
  7. 4References

1.1 TI AM13E230x Introduction

AM13E230x microcontrollers (MCUs) are part of the AM13x highly integrated, low-cost, 32-bit MCU family based on the Arm Cortex-M33 32-bit CPU operating at up to 200MHz frequency. These real-time control-optimized MCUs offer high-performance analog, control, and digital peripheral integration. The MCUs provide up to 512KB of embedded flash program memory (two banks of up to 256KB) with built-in error correction code (ECC) and up to 128KB SRAM with hardware parity. Smaller memory configuration variants are also offered.

Enhanced communication interfaces are supported through one MCAN and up to six UNICOMM peripherals to support a combination of UART/LIN, I2C/SMBUS, and SPI. For connecting to external devices or memory, the high-speed EPI can connect to SDRAM or asynchronous RAM devices such as FPGA or ASIC.


AM13E230x Functional Block Diagram

Figure 1-1 AM13E230x Functional Block Diagram