SLAZ152I October   2012  – May 2021 MSP430F2002

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      PW14
      2.      N14
      3.      RSA16
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  BCL9
    2. 6.2  BCL10
    3. 6.3  BCL11
    4. 6.4  BCL12
    5. 6.5  BCL13
    6. 6.6  BCL14
    7. 6.7  CPU4
    8. 6.8  EEM20
    9. 6.9  FLASH16
    10. 6.10 FLASH22
    11. 6.11 PORT10
    12. 6.12 SBW1
    13. 6.13 SYS15
    14. 6.14 TA12
    15. 6.15 TA16
    16. 6.16 TA21
    17. 6.17 TAB22
    18. 6.18 USI4
    19. 6.19 USI5
    20. 6.20 XOSC5
    21. 6.21 XOSC8
  7. 7Revision History

CPU4

CPU Module

Category

Compiler-Fixed

Function

PUSH #4, PUSH #8

Description

The single operand instruction PUSH cannot use the internal constants (CG) 4 and 8.  The other internal constants (0, 1, 2, -1) can be used. The number of clock cycles is different:

PUSH #CG   uses address mode 00, requiring 3 cycles, 1 word instruction
PUSH #4/#8 uses address mode 11, requiring 5 cycles, 2 word instruction

Workaround

Refer to the table below for compiler-specific fix implementation information.

IDE/Compiler Version Number Notes
IAR Embedded Workbench IAR EW430 v2.x until v6.20 User is required to add the compiler flag option below. --hw_workaround=CPU4
IAR Embedded Workbench IAR EW430 v6.20 or later Workaround is automatically enabled
TI MSP430 Compiler Tools (Code Composer Studio) v1.1 or later
MSP430 GNU Compiler (MSP430-GCC) MSP430-GCC 4.9 build 167 or later