SLAZ626W August   2014  – May 2021 MSP430FR2032

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      DGG48
      2.      DGG56
      3.      PM64
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  ADC39
    2. 6.2  ADC50
    3. 6.3  ADC63
    4. 6.4  CPU21
    5. 6.5  CPU22
    6. 6.6  CPU40
    7. 6.7  CPU46
    8. 6.8  CS11
    9. 6.9  CS13
    10. 6.10 EEM23
    11. 6.11 EEM28
    12. 6.12 EEM30
    13. 6.13 GC1
    14. 6.14 GC4
    15. 6.15 GC5
    16. 6.16 PMM32
    17. 6.17 PORT28
    18. 6.18 RTC15
    19. 6.19 SYS23
    20. 6.20 USCI41
    21. 6.21 USCI42
    22. 6.22 USCI45
    23. 6.23 USCI47
    24. 6.24 USCI50
  7. 7Revision History

CPU40

CPU Module

Category

Compiler-Fixed

Function

PC is corrupted when executing jump/conditional jump instruction that is followed by instruction with PC as destination register or a data section

Description

If the value at the memory location immediately following a jump/conditional jump instruction is 0X40h or 0X50h (where X = don't care), which could either be an instruction opcode (for instructions like RRCM, RRAM, RLAM, RRUM) with PC as destination register or a data section (const data in flash memory or data variable in
RAM), then the PC value is auto-incremented by 2 after the jump instruction is executed; therefore, branching to a wrong address location in code and leading to wrong program execution.

For example, a conditional jump instruction followed by data section (0140h).

@0x8012   Loop     DEC.W  R6
@0x8014            DEC.W  R7
@0x8016            JNZ    Loop
@0x8018   Value1   DW     0140h

Workaround

In assembly, insert a NOP between the jump/conditional jump instruction and program code with instruction that contains PC as destination register or the data section.

Refer to the table below for compiler-specific fix implementation information.

IDE/Compiler Version Number Notes
IAR Embedded Workbench IAR EW430 v5.51 or later For the command line version add the following information Compiler: --hw_workaround=CPU40 Assembler:-v1
TI MSP430 Compiler Tools (Code Composer Studio) v4.0.x or later User is required to add the compiler or assembler flag option below. --silicon_errata=CPU40
MSP430 GNU Compiler (MSP430-GCC) Not affected