SLLS983L June   2009  – October 2023 ISO1050

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics - DC Specification
    10. 6.10 Switching Characteristics
    11. 6.11 Insulation Characteristics Curves
    12. 6.12 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 CAN Bus States
      2. 8.3.2 Digital Inputs and Outputs
      3. 8.3.3 Protection Features
        1. 8.3.3.1 TXD Dominant Time-Out (DTO)
        2. 8.3.3.2 Thermal Shutdown
        3. 8.3.3.3 Undervoltage Lockout and Fail-Safe
        4. 8.3.3.4 Floating Pins
        5. 8.3.3.5 CAN Bus Short-Circuit Current Limiting
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Bus Loading, Length and Number of Nodes
        2. 9.2.2.2 CAN Termination
      3. 9.2.3 Application Curve
  11. 10Power Supply Recommendations
    1. 10.1 General Recommendations
    2. 10.2 Power Supply Discharging
  12. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  14. 13Mechanical, Packaging, and Orderable Information

6.9 Electrical Characteristics - DC Specification

Typical specifications are at VCC1 = 3.3V, VCC2 = 5V, Min/Max are over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CHARACTERISTICS
ICC1 Supply current Side 1 VI = 0 V or VCC1, VCC1 = 3.3 V   1.8 3.6 mA
ICC1 Supply current Side 1 VI = 0 V or VCC1, VCC1 = 5.0 V   2.3 3.6 mA
ICC2 Supply current Side 2 VI = 0 V, bus dominant, RL = 60 Ω   52 73 mA
ICC2 Supply current Side 2 VI = VCC1    8 12 mA
DRIVER ELECTRICAL CHARACTERISTICS
VO(DOM) Bus output voltage(Dominant), CANH See Figure 7-1 and Figure 7-2, VI = 0 V, RL = 60 Ω 2.9 3.5 4.5 V
Bus output voltage(Dominant), CANL See Figure 7-1 and Figure 7-2, VI = 0 V, RL = 60 Ω 0.8 1.2 1.78 V
VO(REC) Bus output voltage(recessive), CANH and CANL See Figure 7-1 and Figure 7-2, VI = 2 V, RL = 60 Ω 2.0 2.3 3.0 V
VOD(DOM) Differential output voltage(dominant) See Figure 7-1 and Figure 7-2, VI = 0 V, RL = 60 Ω 1.5 3.0 V
See Figure 7-1 and Figure 7-2, VI = 0 V, RL = 45 Ω, VCC > 4.8 V 1.4 3.0 V
VOD(REC) Differential output voltage(recessive) See Figure 7-1 and Figure 7-2, VI = 3 V, RL = 60 Ω -120.0 12.0 mV
VI = 3 V, No Load  -500.0 50.0 mV
VOC(DOM) Common-mode output voltage (Dominant) See Figure 7-8 2 2.3 3.0 V
VOC(pp) Peak-to-peak common-mode output voltage See Figure 7-8 0.3 V
IIH High level input leakage current VI = 2 V 5 uA
IIL Low level input leakage current VI = 0.8 V -5 uA
IO(off) Power-off TXD leakage current VCC1, VCC2 at 0 V, TXD = 5 V 10 uA
IOS(ss) Short circuit current steady state output current, dominant See Figure 7-11, CANH = –12 V, CANL Open -105 -72   mA
See Figure 7-11, VCANH = 12 V, CANL Open 0.36 6.2 mA
See Figure 7-11, VCANL =–12 V, CANH Open -1 -0.5 mA
See Figure 7-11, VCANL = 12 V, CANH Open 71 105 mA
CMTI Common-mode transient immunity See Figure 7-13, VI = VCC or 0 V 25 50 kV/us
RECEIVER ELECTRICAL CHARACTERISTICS
VIT+ Positive-going bus input threshold voltage See Table 1 750 900.0 mV
VIT- Negative-going bus input threshold voltage 500.0 650 mV
VHYS Hysteresis voltage for differential input threshold 150 mV
VOH High level output voltage with Vcc = 5 V IO = -4 mA, See Figure 7-6 Vcc - 0.8 4.6 V
IO = -20 uA, See Figure 7-6 Vcc - 0.1 5 V
VOH High level output voltage with Vcc1 = 3.3 V IO = 4 mA, See Figure 7-6 Vcc - 0.8 3.1 V
IO = 20 uA, See Figure 7-6 Vcc - 0.1 3.3 V
VOL Low level output voltage IO = 4 mA, See Figure 7-6 0.2 0.4 V
IO = 20 uA, See Figure 7-6 0 0.1 V
CI Input capacitance to ground (CANH or CANL) TXD = 3 V, VI = 0.4 sin (4e6pi*t) + 2.5 V   12 pF
CID Differential input capacitance TXD = 3 V, VI = 0.4 sin (4e6pi*t)   8 pF
RID Differential input resistance TXD = 3 V 40 90 kΩ
RIN Input resistance (CANH or CANL) TXD = 3 V 20 45 kΩ
RIN(M) Input resistance matching: (1 - RIN(CANH)/RIN(CANL)) x 100% VCANH = VCANL -3 3 %
CMTI Common-mode transient immunity See Figure 7-13, VI = VCC or 0 V 25 50 kV/us