SLLSEB0E February   2012  – September 2023 TPD1E10B09

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Features

  • Provides system-level ESD protection for I/O interfaces up to ±9 V
  • IEC 61000-4-2 level 4:
    • ±20 kV (air-gap discharge)
    • ±20 kV (contact discharge)
  • IEC 61000-4-5 surge protection:
    • 4.5 a (8/20 µs)
  • I/O capacitance 10 pf (typical)
  • RDYN 0.5 ω (typical)
  • DC breakdown voltage ±9.5 V (minimum)
  • Ultra low leakage current 100 nA (maximum)
  • 13-V clamping voltage (maximum at IPP = 1 A)
  • Industrial temperature range: –40°C to 125°C
  • Space-saving 0402 footprint
    (1 mm × 0.6 mm × 0.5 mm)