SLLSEB1F
February 2012 – October 2021
TPD1E10B06
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings—JEDEC Specification
6.3
ESD Ratings—IEC Specification
6.4
Recommended Operating Conditions
6.5
Thermal Information
6.6
Electrical Characteristics
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Receiving Notification of Documentation Updates
11.2
Support Resources
11.3
Trademarks
11.4
Electrostatic Discharge Caution
11.5
Glossary
12
Mechanical, Packaging, and Orderable Information
6.7
Typical Characteristics
Figure 6-1
IEC 61000-4-2 Clamp Voltage +8 kV Contact ESD
Figure 6-3
Transmission Line Pulse (TLP) Waveform Pin 1 to Pin 2
Figure 6-5
IV Curve
Figure 6-7
Negative Surge Waveform 8 to 20 µs
Figure 6-9
Insertion Loss
Figure 6-2
IEC 61000-4-2 Clamp Voltage –8-kV Contact ESD
Figure 6-4
Transmission Line Pulse (TLP) Waveform Pin 2 to Pin 1
Figure 6-6
Positive Surge Waveform 8 to 20 µs
Figure 6-8
Pin Capacitance Across V
BIAS