SLLSFT0 December   2022 ISOW7742-Q1

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)

Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the ISOW7742-Q1 in 20-DFM package. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

  • Pin short-circuited to ground (see Table 4-2)
  • Pin open-circuited (see Table 4-3)
  • Pin short-circuited to an adjacent pin (see Table 4-4)
  • Pin short-circuited to supply (see Table 4-5)

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
ClassFailure Effects
APotential device damage that affects functionality.
BNo device damage, but loss of functionality.
CNo device damage, but performance degradation.
DNo device damage, no impact to functionality or performance.

Figure 4-1 shows the ISOW7742-Q1 pin diagram. For a detailed description of the device pins, see the Pin Configuration and Functions section in the ISOW7742-Q1 data sheet.

Figure 4-1 Pin Diagram (20-DFM) Package
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
VIO 1 No power to the IO on side-1. Observe that the absolute maximum ratings for all IO pins of the device are met; otherwise device damage may be plausible. OUTx states undetermined. A
INA 2 Input signal shorted to ground, so output (OUTA) stuck to low. Communication from INA to OUTA corrupted. B
INB 3 Input signal shorted to ground, so output (OUTB) stuck to low. Communication from INB to OUTB corrupted. B
OUTC 4 OUTC stuck low. Data communication from INC to OUTC lost. Device damage possible if INC is driven high for extended period of time. A
OUTD 5 OUTD stuck low. Data communication from IND to OUTD lost. Device damage possible if IND is driven high for extended period of time. A
GNDIO 6 Device continues to function as expected. Normal operation. D
EN_IO1 7 Side 1 IO enable pin shorted to ground, so INA, INB and INC are disable and OUTD is in a high impedance state. B
EN/FLT 8 Power converter enable pin shorted to ground, so the integrated DC-DC power converter is disabled B
VDD 9 No power to side 1 DC-DC converter. Device damage may be plausible if high current flow from the VDD to ground A
GND1 10 Device continues to function as expected. Normal operation. D
GND2 11 Device continues to function as expected. Normal operation. D
VISOOUT 12 Isolated power converter output pin shorted to ground. Device damage may be plausible if high current flow from the VISOOUT to ground A
VSEL 13 VSEL shorted to ground, so VISOUT is stuck at 3.3V. B
EN_IO2 14 Side 2 IO enable pin shorted to ground, so IND is disable and OUTA, OUTB and OUTC are in a high impedance state. C
GISOIN 15 Device continues to function as expected. Normal operation. D
IND 16 Input signal shorted to ground, so output (OUTD) stuck to low. Communication from IND to OUTD corrupted. B
INC 17 Input signal shorted to ground, so output (OUTC) stuck to low. Communication from INC to OUTC corrupted. B
OUTB 18 OUTB stuck low. Data communication from INB to OUTB lost. If INB is driven high, this failure can create short circuit of VISO to GND2. B
OUTA 19 OUTA stuck low. Data communication from INA to OUTA lost. If INA is driven high, this failure can create short circuit of VISO to GND2. B
VISOIN 20 Side 2 supply volatge shorted to ground, so no power to side 2. If VISOIN is connected to VISOOUT, device damage may be plausible if high current flow from the VDD to ground A
Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
VIO 1 Operation undetermined. Either device is unpowered and OUTx undetermined or through internal ESD diode on INA/INB/INC pin, device can power up if any IN is driven to logic high and has sourcing capability. ESD diode from IN to VCC conducts the regular operating current, hence device damage plausible. A
INA 2 No communication to INA channel possible. OUTA stuck to default state (High for ISOW7742-Q1 and Low for ISOW7742F-Q1). B
INB 3 No communication to INB channel possible. OUTB stuck to default state (High for ISOW7742-Q1 and Low for ISOW7742F-Q1). B
OUTC 4 State of OUTC undetermined. Data communication from INC to OUTC lost. B
OUTD 5 State of OUTD undetermined. Data communication from IND to OUTD lost. B
GNDIO 6 No Return ground for IO. IO unpowered on side 1. B
EN_IO1 7 Side 1 enable pin is open, so OUTD is always enabled. B
EN/FLT 8 EN/FLT is open, so integrated DC/DC converter state is undefiend B
VDD 9 No power to the integrated DC/DC converter. VISOOUT is undefined. B
GND1 10 No Return ground for integrated DC/DC connverter. VISOOUT is undefined. B
GND2 11 No Return ground for VISOOUT. Side 2 IO has no power. B
VISOOUT 12 VISOOUT is open, so VISOIN has no power B
VSEL 13 VSEL is open, so default to VISOOUT 5V B
EN_IO2 14 Side 2 enable pin is open, so OUTA, OUTB, and OUTC are always enabled. B
GISOIN 15 No Return ground for VISOIN. No power to the IO. B
IND 16 No communication to IND channel possible. OUTD stuck to default state (High for ISOW7742-Q1 and Low for ISOW7742F-Q1). B
INC 17 No communication to INC channel possible. OUTC stuck to default state (High for ISOW7742-Q1 and Low for ISOW7742F-Q1). B
OUTB 18 State of OUTB undetermined. Data communication from INB to OUTB lost. B
OUTA 19 State of OUTA undetermined. Data communication from INA to OUTA lost. B
VISOIN 20 No power to VISOIN, so IO has no power. B
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin NamePin No.Shorted toDescription of Potential Failure EffectsFailure Effect Class
VIO 1 INA If INA is low, No power to the device on side-1. Observe that the absolute maximum ratings for all pins of the device are met; otherwise device damage may be plausible. A
INA 2 INB ommunication corrupted for either INA or INB channel. B
INB 3 OUTC Communication corrupted for either or both channels. With opposite logic state on both channels, high current can flow between supply and ground and cause possible device damage. A
OUTC 4 OUTD Communication corrupted for either or both channels. With opposite logic state on both channels, high current can flow between supply and ground and cause possible device damage. A
OUTD 5 GNDIO OUTD shorted to ground. High current can flow between OUTD and ground and cause possible device damage. A
GNDIO 6 EN_IO1 Disables OUTD output buffer. Communication for channel D corrupted. B
EN_IO1 7 EN/FLT IO and integrated DC/DC conveter are enabled or disabled simultaneously. B
EN/FLT 8 VDD Integrated DC/DC converter is always enabled B
VDD 9 GND1 High current can flow between DC/DC converter supply and ground and cause possible device damage. A
GND1 10 VDD Already considered in above row. A
GND2 11 VISOOUT Integrated DC/DC converter output shorted to ground, so high current can flow between DC/DC converter output and ground and cause possible device damage. A
VISOOUT 12 VSEL If VSEL is logic low, high current can flow between VISOOUT and VSEL and cause possible device damage. A
VSEL 13 EN_IO2 VSEL and EN_IO2 are coupled together. B
EN_IO2 14 GISOIN Side 2 IO is disabled, so IND is disable and OUTA, OUTB and OUTC are in a high impedance state. B
GISOIN 15 IND OUTD is always low. B
IND 16 INC Communication corrupted for either IND or INC channel B
INC 17 OUTB Communication corrupted for either or both channels. With opposite logic state on both channels, high current can flow between supply and ground and cause possible device damage. A
OUTB 18 OUTA Communication corrupted for either OUTA or OUTB channel. Device damage possible if INA and INB try to drive opposite logic state for extended duration creating a short between supply and ground on side-2. A
OUTA 19 VISOIN Side 2 has no power if OUTA is driven low. B
VISOIN 20 OUTA Already considered in above row. B
Table 4-5 Pin FMA for Device Pins Short-Circuited to supply
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
VIO 1 No effect. Normal operation. D
INA 2 INA pin stuck high. Communication corrupted. OUTA state high. B
INB 3 INB pin stuck high. Communication corrupted. OUTB state high. B
OUTC 4 OUTC stuck high. Data communication from INC to OUTC lost. Device damage possible if INC is driven low for extended period of time. A
OUTD 5 OUTD stuck high. Data communication from INC to OUTC lost. Device damage possible if IND is driven low for extended period of time causing a short between supply and ground on side-1 A
GNDIO 6 This will create supply to ground short on PCB causing the device to turn off. B
EN_IO1 7 Functionality to disable output buffer OUTD lost. Communication for all channels normal. B
EN/FLT 8 Functionality to disable integrated DC/DC converter lost. B
VDD 9 No effect. Normal operation. D
GND1 10 This will create supply to ground short on PCB causing the device to turn off. B
GND2 11 This will cause VISOOUT to ground short making the device go in short circuit protection mode. B
VISOOUT 12 Device continues to function as expected. Normal operation. D
VSEL 13 This will cause VISOOUT to default at 5V B
EN_IO2 14 Functionality to disable output buffer OUTD lost. Communication for all channels normal. B
GISOIN 15 No effect. Normal operation. D
IND 16 IND pin stuck high. Communication corrupted. OUTD state high. B
INC 17 INC pin stuck high. Communication corrupted. OUTC state high. B
OUTB 18 OUTB stuck high. Communication disrupted. If INB is low for extended duration, OUTB being stuck high creates a short and can cause device go to short circuit protection mechanism. B
OUTA 19 OUTA stuck high. Communication disrupted. If INA is low for extended duration, OUTA being stuck high creates a short and can cause device go to short circuit protection mechanism. B
VISOIN 20 Device continues to function as expected. Normal operation. D