SLOS467I October   2006  – July 2026 TL971 , TL972 , TL974

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings Old Die
    3. 5.3 ESD Ratings New Die
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Thermal Information
    6. 5.6 Electrical Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Feature Description
      1. 6.2.1 Common-Mode Voltage Range
      2. 6.2.2 Operating Voltage
    3. 6.3 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Typical Application
      1. 7.1.1 Design Requirements
      2. 7.1.2 Detailed Design Procedure
        1. 7.1.2.1 Output Voltage Swing
    2. 7.2 Power Supply Recommendations
    3. 7.3 Layout
      1. 7.3.1 Layout Guidelines
      2. 7.3.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Third-Party Products Disclaimer
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

5.7 Typical Characteristics

TL971 TL972 TL974 Gain And Phase vs Frequency, Old DieFigure 5-1 Gain And Phase vs Frequency, Old Die
TL971 TL972 TL974 Closed-Loop Gain vs Frequency, New DieFigure 5-3 Closed-Loop Gain vs Frequency, New Die
TL971 TL972 TL974 Input Voltage Noise Spectral Density vs Frequency, New DieFigure 5-5 Input Voltage Noise Spectral Density vs Frequency, New Die
TL971 TL972 TL974 Phase Margin vs Capacitive Load, New Die
G = +1
Figure 5-7 Phase Margin vs Capacitive Load, New Die
TL971 TL972 TL974 Power-Supply Ripple Rejection vs Frequency, Old DieFigure 5-9 Power-Supply Ripple Rejection vs Frequency, Old Die
TL971 TL972 TL974 Output Voltage vs Output Current, Old DieFigure 5-11 Output Voltage vs Output Current, Old Die
TL971 TL972 TL974 Output Voltage Swing vs Output Current (Sinking), New Die
VS = 5V
Figure 5-13 Output Voltage Swing vs Output Current (Sinking), New Die
TL971 TL972 TL974 Open-Loop Output Impedance vs Frequency, New DieFigure 5-15 Open-Loop Output Impedance vs Frequency, New Die
TL971 TL972 TL974 Slew Rate vs Input Step Voltage, New Die

G = +1, CL = 20pF

Figure 5-17 Slew Rate vs Input Step Voltage, New Die
TL971 TL972 TL974 Small-Signal Overshoot vs Capacitive Load, New Die
20mVpp Output Step, G = +1
Figure 5-19 Small-Signal Overshoot vs Capacitive Load, New Die
TL971 TL972 TL974 Slew Rate vs Input Differential Voltage, New DieFigure 5-21 Slew Rate vs Input Differential Voltage, New Die
TL971 TL972 TL974 Gain And Phase vs Frequency, Old DieFigure 5-2 Gain And Phase vs Frequency, Old Die
TL971 TL972 TL974 Input Voltage Noise vs Frequency, Old DieFigure 5-4 Input Voltage Noise vs Frequency, Old Die
TL971 TL972 TL974 Phase Margin vs Supply Voltage, Old DieFigure 5-6 Phase Margin vs Supply Voltage, Old Die
TL971 TL972 TL974 Input Response, Old DieFigure 5-8 Input Response, Old Die
TL971 TL972 TL974 CMRR and PSRR vs Frequency, New Die
Figure 5-10 CMRR and PSRR vs Frequency, New Die
TL971 TL972 TL974 Output Voltage Swing vs Output Current (Sourcing), New Die
VS = 5V
Figure 5-12 Output Voltage Swing vs Output Current (Sourcing), New Die
TL971 TL972 TL974 Output Impedance vs Frequency, Old DieFigure 5-14 Output Impedance vs Frequency, Old Die
TL971 TL972 TL974 Slew Rate vs Supply Voltage, Old DieFigure 5-16 Slew Rate vs Supply Voltage, Old Die
TL971 TL972 TL974 Small-Signal Overshoot vs Capacitive Load, New Die
20mVpp Output Step, G = -1
Figure 5-18 Small-Signal Overshoot vs Capacitive Load, New Die
TL971 TL972 TL974 Input Bias Current and Offset Current vs Temperature, New DieFigure 5-20 Input Bias Current and Offset Current vs Temperature, New Die