SLUSBU5V
November 2013 – September 2025
BQ2961
,
BQ2962
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Device Comparison Table
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Pin Details
7.3.1.1
Input Sense Voltage, Vx
7.3.1.2
Output Drive, OUT
7.3.1.3
Supply Input, VDD
7.3.1.4
Regulated Supply Output, REG
7.3.2
Overvoltage Sensing for OUT
7.3.3
Regulated Output Voltage
7.4
Device Functional Modes
7.4.1
NORMAL Mode
7.4.2
OVERVOLTAGE Mode
7.4.3
UNDERVOLTAGE Mode
7.4.4
CUSTOMER TEST Mode
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Device Support
11.1.1
Third-Party Products Disclaimer
11.2
Receiving Notification of Documentation Updates
11.3
Support Resources
11.4
Trademarks
11.5
Electrostatic Discharge Caution
11.6
Glossary
12
Revision History
13
Mechanical, Packaging, and Orderable Information
1
Features
2-series, 3-series, and 4-series cell overvoltage protection (OVP)
Fixed delay timer to trigger FET drive output (3-s, 4-s, 5.5-s, or 6.5-s options)
Factory programmed OVP threshold (threshold range 3.85V to 4.6V)
Output options: active high
High-accuracy overvoltage protection: ±10mV
Regulated supply output with self-disable and/or external enable/disable control
Options: 3.3V, 2.5V, and 1.8V (BQ2961)
Options: 3.3V, 3.15V, 3.0V (BQ2962)
Low power consumption I
CC
~ 4µA (V
CELL(ALL)
< V
PROTECT
)
Extra low power consumption with reg output disabled, I
CC
~ 1.2µA
Low leakage current per cell input < 100nA
Small package footprint
8-Pin WSON (2mm × 2mm)