SLUSDW2D November   2021  – February 2026 BQ27Z746

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configurations and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
      1. 5.5.1 Supply Current
      2. 5.5.2 Common Analog (LDO, LFO, HFO, REF1, REF2, I-WAKE)
      3. 5.5.3 Battery Protection (CHG, DSG)
      4. 5.5.4 Cell Sensing Output (BAT_SP, BAT_SN)
      5. 5.5.5 Gauge Measurements (ADC, CC, Temperature)
      6. 5.5.6 Flash Memory
    6. 5.6 Digital I/O: DC Characteristics
    7. 5.7 Digital I/O: Timing Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  BQ27Z746 Processor
      2. 6.3.2  Battery Parameter Measurements
        1. 6.3.2.1 Coulomb Counter (CC) and Digital Filter
        2. 6.3.2.2 ADC Multiplexer
        3. 6.3.2.3 Analog-to-Digital Converter (ADC)
        4. 6.3.2.4 Internal Temperature Sensor
        5. 6.3.2.5 External Temperature Sensor Support
      3. 6.3.3  Power Supply Control
      4. 6.3.4  ENAB Pin
      5. 6.3.5  Bus Communication Interface
      6. 6.3.6  Low Frequency Oscillator
      7. 6.3.7  High Frequency Oscillator
      8. 6.3.8  1.8V Low Dropout Regulator
      9. 6.3.9  Internal Voltage References
      10. 6.3.10 Overcurrent in Discharge Protection
      11. 6.3.11 Overcurrent in Charge Protection
      12. 6.3.12 Short-Circuit Current in Discharge Protection
      13. 6.3.13 Primary Protection Features
      14. 6.3.14 Battery Sensing
      15. 6.3.15 Gas Gauging
      16. 6.3.16 Zero Volt Charging (ZVCHG)
      17. 6.3.17 Charge Control Features
      18. 6.3.18 Authentication
    4. 6.4 Device Functional Modes
      1. 6.4.1 Lifetime Logging Features
      2. 6.4.2 Configuration
        1. 6.4.2.1 Coulomb Counting
        2. 6.4.2.2 Cell Voltage Measurements
        3. 6.4.2.3 Auto Calibration
        4. 6.4.2.4 Temperature Measurements
  8. 7 Applications and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Design Requirements (Default)
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Changing Design Parameters
      3. 7.2.3 Calibration Process
      4. 7.2.4 Gauging Data Updates
        1. 7.2.4.1 Application Curve
          1. 7.2.4.1.1 ESD Mitigation
  9. 8 Power Supply Recommendations
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Third-Party Products Disclaimer
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Orderable, and Packaging Information

5.5.4 Cell Sensing Output (BAT_SP, BAT_SN)

Unless otherwise noted, characteristics noted under conditions of TA = –40 to 85℃
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Static Response
VBUFACC Buffer accuracy
(BAT_SP – BAT_SN)		 VBAT @ 1500mV and 2400mV DC,
PACK-BAT_SP ≥ 200mV,
BAT_SP load: Hi-Z to 1kΩ,
BAT_SN load: 1kΩ to 10kΩ		 1450 1500 1550 mV
2350 2400 2450
VBUFOFFS BAT_SN common mode shift
(BAT_SN – VSS)		 400mV option, VBAT = 1.5V to 2.5V 370 400 430 mV
200mV option, VBAT = 2.0V to 2.5V 170 200 230
0mV option, VBAT = 2.0V to 2.5V –30 0 30
600mV option, VBAT = 2.0 to 2.5V 550 600 650
ΔVBUF_LINE Buffer line regulation VBAT = 1.5 to 2.5V, no load, BAT_SP – BAT_SN, VPACK – VBAT = 1.0V 10 mV
ΔVBUF_LOAD Buffer load regulation VBAT = 2.4V, load = 1mA, BAT_SP – BAT_SN, VPACK - VBAT = 1.0V 1.2 mV
VRLOACC RLO mode accuracy
(BAT_SP – BAT_SN)		 VBAT = 3000mV to 5000mV DC,
For stability, 0mV buffer option enabled
BAT_SP load: Hi-Z to 1kΩ
BAT_SN load: 1kΩ to 10kΩ		 –7 +7 mV
VRLOACCP RLO mode accuracy
(BAT_SP – VSS)		 –5 +5
VRLOACCN RLO mode accuracy
(BAT_SN – VSS)		 –5 +5
RLO_SP BAT_SP low resistance mode 200Ω option, DSG FET = ON 160 200 260 Ω
510Ω option, DSG FET = ON 459 510 561
RLO_SN BAT_SN low resistance mode 200Ω option, DSG FET = ON 160 200 260 Ω
510Ω option, DSG FET = ON 459 510 561
RHIZ_SP BAT_SP high impedance mode CHG FET = OFF 0.6 1.0 1.3 MΩ
RHIZ_SN BAT_SN high impedance mode 0.6 1.0 1.3
tBUF_OFF Buffer turn-off timing (1) Buffer disable timing respect to DSG FET turn-on 500 us
CBUF_SP Max external capacitance for stable operation (1) BAT_SP to SRN (PACK–) 150 pF
CBUF_SN BAT_SN to SRN (PACK–) 150
BBUF_BW Buffer unity gain bandwidth (1) Buffer enabled 30 kHz
VBCP BAT_SP – BAT +Fault (BCP) Threshold Range(1)

Recommended threshold range.
Factory trimmed in approximately 2mV steps

 +100 +250 mV

Factory default trimmed threshold(3)

 +200
VBCP_ACC BAT_SP – BAT +Fault Accuracy (3) RLO mode enabled,
Step size 10mV		 –10 +10
VBDP BAT_SP – BAT –Fault (BDP) Threshold Range(1) Recommended threshold range.
Factory trimmed in approximately 2mV steps		 –250 –100 mV
Factory default trimmed threshold(3) –200
VBDP_ACC BAT_SP – BAT –Fault Accuracy (3) RLO mode enabled,
Step size 10mV		 –10 +10
VBCN BAT_SN – VSS +Fault (BCN) Threshold Range(1) Recommended threshold range.
Factory trimmed in approximately 2mV steps		 +100 +250 mV
Factory default trimmed threshold(3) +200
VBCN_ACC BAT_SN – VSS +Fault Accuracy (3) RLO mode enabled,
Step size 10mV		 –10 +10
VBDN BAT_SN – VSS –Fault (BDN) Threshold Range(1) Recommended threshold range.
Factory trimmed in approximately 2mV steps		 –250 –100 mV
Factory default trimmed threshold(3) –200
VBDN_ACC BAT_SN – VSS –Fault Accuracy (3) RLO mode enabled,
Step size 10mV		 –10 +10
tLO_FAULT_DLY BAT_SP / BAT_SN
fault comparator delay(1)		 8ms delay 8 ms
100ms delay 100 ms
tLO_FAULT_STRT BAT_SP / BAT_SN
fault restart time (1)(2)		 1000 ms
Transient Response
VLOAD_SP BAT_SP load transient (1) No load ≥ 1KΩ ≥ No load,
Transition time 1μs		 –300 300 mV
VLOAD_SN BAT_SN load transient (1) –200 200 mV
VLINE_SN BAT_SN line transient (1) VBAT = 1.5V ≥ 2.4V ≥ 1.5V,
Transition slope 500mV / 10us		 –30 30 mV
VTRANS (BAT_SP – BAT_SN)
transition transient (1)		 Firmware commanded transition from BUF mode to RLO mode –700 50 mV
(1) Specified by Design. Not production tested.
(2) Firmware-based parameter. Not production tested.
(3) Accuracy assured by factory trim at specified default threshold. A change from the default threshold requires device calibration in the field. Refer to the BQ27Z746 Technical Reference Manual.