SLUSFP1D April   2024  – April 2026 UCC34141-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Insulation Specifications
    6. 6.6 Electrical Characteristics
    7. 6.7 Safety Limiting Values
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Stage Operation
        1. 7.3.1.1 VDD-COM Voltage Regulation
        2. 7.3.1.2 COM-VEE Voltage Regulation
        3. 7.3.1.3 COM-VEE Output Capability
      2. 7.3.2 Output Voltage Soft Start
      3. 7.3.3 ENA and Power-Good
      4. 7.3.4 Protection Functions
        1. 7.3.4.1 Input Undervoltage Lockout
        2. 7.3.4.2 Input Overvoltage Lockout
        3. 7.3.4.3 Output Undervoltage Protection
        4. 7.3.4.4 Output Overvoltage Protection
        5. 7.3.4.5 Output Short Circuit Protection
        6. 7.3.4.6 Over-Temperature Protection
        7. 7.3.4.7 BSW Pin Faults Protection
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 VDD-COM Voltage Regulation
        2. 8.2.2.2 COM-VEE Voltage Regulation and Single Output Configuration
    3. 8.3 System Examples
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Third-Party Products Disclaimer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

8.5.2 Layout Example

The PCB layout example, highlighted in the following figures, is based on the schematic shown in Figure 8-1.

UCC34141-Q1 VIN (C2, C3) and VDD (C5, C8) Capacitors Figure 8-5 VIN (C2, C3) and VDD (C5, C8) Capacitors
UCC34141-Q1 FBVDD (R6-7, C6), FBVEE (R5, C4), COMA Routing Figure 8-6 FBVDD (R6-7, C6), FBVEE (R5, C4), COMA Routing
UCC34141-Q1 Thermal Vias Figure 8-7 Thermal Vias
UCC34141-Q1 Isolation Keep Out Region Figure 8-8 Isolation Keep Out Region
UCC34141-Q1 Bottom Side, Buck Boost, VEE LC Placement and Routing Figure 8-9 Bottom Side, Buck Boost, VEE LC Placement and Routing
UCC34141-Q1 Top Side, Component Placement and Routing Figure 8-10 Top Side, Component Placement and Routing