SLUUAS2C October   2013  – November 2021 TPS53915

 

  1.   Trademarks
  2. 1 Introduction
  3. 2 Description
    1. 2.1 Typical Applications
    2. 2.2 Features
  4. 3 Electrical Performance Specifications
  5. 4 Schematic
  6. 5 Test Setup
    1. 5.1 Test Equipment
    2. 5.2 Recommended Test Setup
  7. 6 Configurations
    1. 6.1 PMBus Address Selection
    2. 6.2 Mode Selection
    3. 6.3 VDD Pin Supply Selection
  8. 7 Test Procedure
    1. 7.1 Line and Load Regulation and Efficiency Measurement Procedure
    2. 7.2 PMBUS Setup and Verification
    3. 7.3 Control-Loop Gain and Phase-Measurement Procedure
    4. 7.4 List of Test Points
    5. 7.5 Equipment Shutdown
  9. 8 EVM Assembly Drawing and PCB Layout
  10. 9 Bill of Materials
  11. 10Revision History

6.1 PMBus Address Selection

The PMBus address can be changed as shown in Table 6-1.

Table 6-1 PMBus Address Selection Settings
PMBus ADDRESSRESISTOR DIVIDER RATIO (Ω)(RHIGH) (kΩ)
HIGH-SIDE
RESISTOR		(RLOW) (kΩ)
LOW-SIDE
RESISTOR
(RLOW/RLOW+RHIGH)MINMAX
0011111
> 0.5571300
0011110
0.51000.49580.5247160165
0011101
0.4625044820.4772180154
0011100
0.41820.40730.4294200143
0011011
0.37720.36620.3886200120
0011010
0.33610.32490.3476220110
0011001
0.29850.29050.3067249105
0011000
0.26410.25600.272524988.7
0010111
0.22980.22150.238524071.5
0010110
0.19550.18700.204424960.4
0010101
0.16110.15240.170324947.5
0010100
0.12680.11790.136324936.0
0010011
0.09600.09000.102425527.0
0010010
0.06840.06220.075225518.7
0010001
0.04040.03400.048027011.5
0010000
< 0.0133001

For different switching frequency setting, please change R3 and R4 as shown in Table 6-1.