SLUUBM0D May   2017  – October 2020 TPS92518 , TPS92518-Q1 , TPS92518HV , TPS92518HV-Q1

 

  1.   Trademarks
  2. 1Description
    1. 1.1 Typical Applications
    2. 1.2 Connector Description
  3. 2Performance Specifications
  4. 3Performance Data and Typical Characteristic Curves
    1. 3.1 Startup Waveforms
      1. 3.1.1 Startup After SPI Enable Command
      2. 3.1.2 Startup on Hardware Enable Pin Transition
    2. 3.2 Shutdown Waveforms
      1. 3.2.1 Shutdown After SPI Disable
      2. 3.2.2 Shutdown After Hardware Enable Pin Transition
    3. 3.3 Current Sharing
    4. 3.4 Diode and Boot Capacitor Current
      1. 3.4.1 Diode, Inductor, and Boot Capacitor Current at Low Output Current
      2. 3.4.2 Diode, Inductor, and Boot Capacitor Current at High Output Current
      3. 3.4.3 Shunt FET Dimming
      4. 3.4.4 Undervoltage Lockout Description
  5. 4Schematic, PCB Layout, and Bill of Materials
    1. 4.1 Schematic
    2. 4.2 Layout
    3. 4.3 Bill of Materials
  6. 5Software
    1. 5.1 TPS92518 Demonstration Kit Software Installation
      1. 5.1.1 Windows 10
  7. 6Use of LEDSPIMCUEVM-879 Microcontroller Board for SPI Communications with the TPS92518
  8. 7Revision History

1.2 Connector Description

Table 1-1 describes the connectors and Table 1-2 lists the test points on the EVM and how to properly connect, set up, and use the TPS92518EVM-878.

Table 1-1 Connector Descriptions
ConnectorLabelDescription
J1 and J18VIN, GNDJ1 connects power to channel 1 of the board, and J18 connects power to channel 2. The evaluation board is set up with both channel supplies connected through R15, so power connection can be to either J1 or J18 to power both channels from a single supply. The board silkscreen identifies power (one pin) and ground (two pins) connections on each connector.
J2 and J3LED+, LED– and GNDJ2 connects the channel 1 output to the LED load, and J3 connects the channel 2 output to a separate LED load. The leads to the LED load should be twisted and kept short to minimize voltage drop, inductance, and EMI. The board silkscreen identifies LED+ and LED– and GND.
J4SPI control headerJ4 allows attachment of a header cable for SPI control of the chip. The board silkscreen identifies GND, MISO, MOSI, SCK, and SSN.
J10 and J11SPI control from an LEDSPIMCUEVM-879 controller boardJ10 and J11 allow daisy-chaining TPS92518EVM-878 boards to each other with one LEDSPIMCUEVM-879 control board attached to the left-hand side of the left-most evaluation board for controlling the TPS92518. This interface allows control of the chip hardware enable line, PWM inputs to both channels, SPI lines, and hardware address lines for multiple SSN settings for systems that have multiple TPS92518EVM-878 boards controlled by a single LEDSPIMCUEVM-879 controller interface board.
J12 and J14SPI MISO pullup resistor jumpersJ12 and J14 provide for two different values of pullup resistor to the MISO line, 2.2 kΩ and 4.7 kΩ provided on the evaluation board.
J13 and J6PWM jumpersJ13 and J6 are jumpers provided to allow for PWM signals to the two channels to be generated from an LEDSPIMCUEVM-879 (when populated) or applied from an external source (when jumper is removed and the signal is connected to pin 1 one of the connector). J13 provides PWM to channel 1 of the chip, while J6 provides PWM to channel 2.
J9SSN configuration jumperJ9 allows configuration of the SSN chip select line for use with multiple chips on the same SPI bus.
J8MISOThis jumper enables configurations: shorting pins 5–6 sets the SPI communication architecture up for a single TPS92518 or the end point of a daisy chain of them, shorting 1–2 and 5–6 sets up for a TPS92518 in the middle of a daisy-chain, and shorting 3–4 and 5–6 provides for a star architecture.
J7SPI DI outIf this jumper is closed, it allows multiple TPS92518 devices to be connected in a star configuration.
J10Control connectorThis connector allows the TPS92518 board to attach to a microcontroller, such as the LEDSPIMCUEVM-879.
Table 1-2 Test Points
Test PointDescription
Metal turretsAll metal turrets are grounds.
PWM1 and PWM2The test points labeled PWM1 and PWM2 allow for external signal sources to control the TPS92518 hardware PWM dimming.
ENABLEThe test point labeled ENABLE near J10 allows for an external enable signal to control switching of the TPS92518.
VDIGIThe VDIGI test point allows for external application of power to the MISO pull-up resistors or monitoring of the pull-up voltage.
SW1 and SW2The SW1 and SW2 test points provide locations to monitor the switch nodes of the two channels.
VINThe VIN test point allows for external application of power to the digital system of the chip independent of the analog power supplies to either channel 1 or 2. On the evaluation board this is shorted to the analog supply by R16, so separate application of power is neither necessary nor useful without removal of R16.