SLUUCU3 November   2023

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
      1. 1.1.1 Before You Begin
    2. 1.2 Kit Contents
    3. 1.3 Specifications
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Test Equipment
      1. 2.1.1 Voltage Source
      2. 2.1.2 Oscilloscope
      3. 2.1.3 Multimeters
      4. 2.1.4 Output Load
      5. 2.1.5 Fan
      6. 2.1.6 USB-to-GPIO Interface Adapter
      7. 2.1.7 Recommended Wire Gauge
      8. 2.1.8 List of Test Points, Jumpers, and Connectors
    2. 2.2 Test Setup
      1. 2.2.1 Test and Configuration Software
        1. 2.2.1.1 Description
        2. 2.2.1.2 Features
      2. 2.2.2 Evaluating Split Rail Input
  9. 3Software
    1. 3.1 Using the Fusion GUI
      1. 3.1.1  Opening the Fusion GUI
      2. 3.1.2  General Settings
      3. 3.1.3  Changing ON_OFF_CONFIG
      4. 3.1.4  Pop-Up for Some Commands While Conversion is Enabled
      5. 3.1.5  SMBALERT# Mask
      6. 3.1.6  Device Info
      7. 3.1.7  Phase Commands
      8. 3.1.8  All Config
      9. 3.1.9  Monitor
      10. 3.1.10 Status
    2. 3.2 EVM Configuration Using the Fusion GUI
      1. 3.2.1 Configuration Procedure
  10. 4Implementation Results
    1. 4.1 Performance Data and Typical Characteristic Curves
      1. 4.1.1 Efficiency
      2. 4.1.2 Load Regulation
      3. 4.1.3 Line Regulation
      4. 4.1.4 Transient Response
      5. 4.1.5 Control Loop Bode Plot
      6. 4.1.6 Output Ripple
      7. 4.1.7 Control On
      8. 4.1.8 Control Off
      9. 4.1.9 Thermal Image
    2. 4.2 Test Procedure
      1. 4.2.1 Line and Load Regulation and Efficiency Measurement Procedure
      2. 4.2.2 Efficiency Measurement Test Points
      3. 4.2.3 Control Loop Gain and Phase Measurement Procedure
  11. 5Hardware Design Files
    1. 5.1 Schematic
    2. 5.2 EVM Assembly Drawing and PCB Layout
    3. 5.3 Bill of Materials
  12. 6Additional Information
    1.     Trademarks

5.2 EVM Assembly Drawing and PCB Layout

Figure 6-2 through Figure 6-9 show the design of the TPSM8S6C24SEVM-1PH printed circuit board.

GUID-20231023-SS0I-ZWWT-59KL-TVB6QPBX4BV1-low.pngFigure 5-2 TPSM8S6C24SEVM-1PH Top Side Component View (Top View)
GUID-20231023-SS0I-VMSS-70VH-1ZQZ2ZT87TRB-low.pngFigure 5-4 TPSM8S6C24SEVM-1PH Top Copper (Top View)
GUID-20231023-SS0I-VXPG-SNR9-MKDDDTWDR6VL-low.pngFigure 5-6 TPSM8S6C24SEVM-1PH Internal Layer 2 (Top View)
GUID-20231023-SS0I-JGGW-3HC1-DWJLNGZ6WDMZ-low.pngFigure 5-8 TPSM8S6C24SEVM-1PH Internal Layer 4 (Top View)
GUID-20231023-SS0I-NRXN-VFGW-23XQFNB7C83P-low.pngFigure 5-10 TPSM8S6C24SEVM-1PH Internal Layer 6 (Top View)
GUID-20231023-SS0I-ZKG8-BGQR-JPZKCXTW1BSG-low.pngFigure 5-3 TPSM8S6C24SEVM-1PH Bottom Side Component View (Bottom View)
GUID-20231023-SS0I-XX2B-6MDJ-HC11FGVX7JP6-low.pngFigure 5-5 TPSM8S6C24SEVM-1PH Internal Layer 1 (Top View)
GUID-20231023-SS0I-LWZZ-GMGB-D4Z19Z2R2ZXN-low.pngFigure 5-7 TPSM8S6C24SEVM-1PH Internal Layer 3 (Top View)
GUID-20231023-SS0I-NRXN-VFGW-23XQFNB7C83P-low.pngFigure 5-9 TPSM8S6C24SEVM-1PH Internal Layer 5 (Top View)
GUID-20231023-SS0I-JL8N-SG7M-V7HNTZBDBHGQ-low.pngFigure 5-11 TPSM8S6C24SEVM-1PH Internal Bottom Layer (Top View)