SLUUCW7 july   2023

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 Test Points and Connectors
    2. 2.2 Test Equipment and Set Up
      1. 2.2.1 Power Supplies
      2. 2.2.2 Meters
      3. 2.2.3 Oscilloscope
      4. 2.2.4 Loads
    3. 2.3 Test Setup and Procedures
      1. 2.3.1 Hot-Plug Test
      2. 2.3.2 Current Limit Test
      3. 2.3.3 Output Hot-Short Test
      4. 2.3.4 Wakeup into Short Test
      5. 2.3.5 Overvoltage Cut-off Test
  8. 3Hardware Design Files
    1. 3.1 Schematic
    2. 3.2 PCB Layouts
    3. 3.3 Bill Of Materials (BOM)
  9. 4Additional Information
    1.     Trademarks

2.1 Test Points and Connectors

Table 3-1 lists the TPS25983EVM eFuse Evaluation Board input and output connector functionality. Table 3-2 and Table 3-3 describe the test point availability and the jumper functionality. Table 3-4 describes the auto-retries and retry-delay settings.

Table 2-1 Input and Output Connector Functionality
Connector Label Description
J1 VIN Power input connector to the positive rail of the input power supply.
J3 PGND Ground connection for the power supply.
J2 VOUT Power output connector to the positive side of the load.
J14 P-LOAD Placeholder for connecting load such as power resistor between J2 and J14.
Table 2-2 Test Points Description
Test Points Label Description
TP1 VIN Input power supply to the EVM
TP2 VOUT Output from the EVM

(Drain of Q3)
TP3 EN/UVP Active high enable and undervoltage input
TP4 VCC_EXT External power supply input for Power good pullup
TP5 PG Power good test point
TP6 DVOUT Output from the TPS25983

(Source of Q3)
TP7 PGND System ground
TP8 GND GND(IC GND)
TP9 GND GND(IC GND)
TP10 GND GND(IC GND)
TP11 ITIMER Fault timer voltage
TP12 ILIM Sets current limit threshold
TP13 RETRY_DLY Sets retry delay time
TP14 DVDT Output voltage ramp control
TP15 IMON Load current monitor
TP16 LOAD_ON Gate control for series MOSFET + Power load
TP17 PGND System ground
TP18 GATE Gate of external blocking FET Q3
TP19 OVLO Overvoltage lockout pin
Table 2-3 Jumper and LED Descriptions
Jumper Label Description
J4 NRETRY NRETRY setting number of auto-retries. Please refer Table 5 for details.

1-2 Position shorts to ground 3-4 Position sets 68 nF
J6 IMON Current scale setting
1-2 Position sets 0.13 V/A
3-4 Position sets 0.25 V/A
J7 PG Pull-Up PG Pull-Up voltage setting
1-2 Position sets external source “VCC_EXT”
3-4 Position sets 3.3 V
J8 VIN_UVLO 1-2 position connects UVLO pin to VIN resistor ladder.
J9 ITIMER ITIMER setting (sets delay before entering into current limit)
OPEN sets ‘0’sec delay
1-2 Position sets 200 µs delay
3-4 Position sets 2 ms delay
5-6 Position sets 20 ms delay
J10 ILIM Current limit setting 1-2 Position sets 2 A
3-4 Position sets 5 A
5-6 Position sets 18 A
7-8 Position sets 20 A
J11 RETRY_DLY Retry delay setting
OPEN sets 200 µs
1-2 Position sets “NO auto-retry” (latches OFF the device)
3-4 Position sets 1 s retry delay
5-6 Position sets 50 ms retry delay
J12 DVDT Output voltage slew rate setting
1-2 Position sets 1.5 V/ms
3-4 Position sets 0.5 V/ms
J13 VIN_OVLO 1-2 position connects OVLO pin to VIN resistor ladder
D3
(GREEN – LED)		 D3 Power good indicator. LED turns on when the internal FET fully turns ON
Table 2-4 Auto-retries and Retry Delay Settings
RETRY_DLY
(J11 Position)		Retry DelayNRETRY
(J4 Position)		Number of Auto-Retries
OPEN200 µsOPEN4
1-2Infinite
2-316
1-2 PositionLatches OFFX0
3-4 Position1 sOPEN4
1-2Infinite
2-316
5-6 Position50 msOPEN4
1-2Infinite
2-364