SLUUCX3 august   2023 TPS51385

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 Input and Output Connections
    2. 2.2 Modifications
      1. 2.2.1 Output Voltage Setpoint
      2. 2.2.2 Mode Selection
  8. 3Implementation Results
    1. 3.1 Evaluation Setup
    2. 3.2 Test Setup and Results
      1. 3.2.1 Start-Up
      2. 3.2.2 Shutdown
      3. 3.2.3 Output Voltage Ripple
  9. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 PCB Layout
    3. 4.3 Bill of Materials
  10. 5Additional Information
    1.     Trademarks
  11. 6References

2.1 Input and Output Connections

The TPS51385EVM is provided with input and output connectors and test points as shown in Table 3-1. Test point TP2 provides a place to monitor the VIN input voltages with TP9 providing a convenient ground reference. TP5 is used to monitor the output voltage with TP12 as the ground reference.

Table 2-1 Connection and Test Points
Reference
Designator		Function
J1VIN (see Table 2-1 for VIN range)
J2VOUT, 5.1 V at 7-A maximum
JP1PG pullup control. Short pin 1 and pin 2 to pull PG up to VCC.
JP2EN high control. Short pin 1 and pin 2 to connect VIN to pin 1 of JP3.
JP3EN control. Short pin 1 and pin 2 of JP2 to make EN high.
JP4Mode control. Float or short pin 2 and pin 3 to set PSM mode. Short pin 2 and pin 1 to set OOA mode.
TP1VIN positive monitor point
TP2VIN positive test point
TP3Switch node (SW) test point
TP4VOUT positive monitor point
TP5VOUT positive test point
TP6EN test point
TP7PG test point
TP8GND monitor point
TP9GND test point
TP10GND monitor point
TP11Loop test point
TP12GND test point
TP13VCC test point
TP14, TP15, TP16GND test point