5 Typical Performance and Waveforms

The application circuit shown in Figure 5-1 is used to generate the data presented in Figure 5-2 – Figure 5-7. To reach the total effective capacitance of 22 µF, the design used 2 x 22-µF Murata [GRM21BR61A226ME44L] capacitors, 2 × 22-µF Samsung [CL21A226MAQNNNE] capacitors, or 3 × 10-µF TDK [C2012X7R0J106K125AB] capacitors. For a 5-V output, loss of capacitance from the DC bias effect can be significant. Unless otherwise specified, V_IN = 5 V and V_OUT = –5 V. The inductor used in the tested circuit is a 22-µH Coilcraft [LPS5030-223].

Figure 5-1 Schematic of the Tested Circuit

Figure 5-2 Efficiency vs. Load Current with V_OUT = –5 V

Figure 5-3 Line Regulation

Figure 5-4 Load Regulation

Figure 5-5 Load Transient Response with V_IN = 5 V

Figure 5-6 Input Voltage Ripple with V_IN = 5 V and 120-mA Load

Figure 5-7 Output Voltage Ripple with V_IN = 5 V and 120-mA Load

Figure 5-8 Output Voltage Ripple with V_IN = 5 V and 10-mA Load

Figure 5-9 Line Transient Response with 120-mA Load