SLVAF46 May 2021 TPS65988
Figure 2-6 shows pictorial representation of Events and GPIOs used in the Dual port power socket design with power balancing.
The output Plug event GPIOs are connected to the input App Config GPIOs of the alternate port. When the input GPIO of a particular port is high (implies plug event on the other port), input GPIO event shall load 50% Power PDO configuration. Otherwise, when the input GPIO of a particular port is low (implies no PLUG_EVENT on the other port, for example, when the other port in disconnected state), input GPIO event shall load 100% Power PDO configuration. This implementation can be tested on TPS65988D EVM using the project file available on the E2E Design Support forum.