SLVSAW6J June   2011  – June 2026 LP2951-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics (Both Legacy and New Chip)
    6. 5.6 Timing Requirements (New Chip only)
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Output Enable
      2. 6.3.2 Dropout Voltage
      3. 6.3.3 Current Limit
      4. 6.3.4 Undervoltage Lockout (UVLO)
      5. 6.3.5 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Shutdown Mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Reverse Current
      2. 7.1.2 Input and Output Capacitor Requirements
      3. 7.1.3 Estimating Junction Temperature
      4. 7.1.4 Power Dissipation (PD)
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
        1. 7.2.1.1 Recommended Capacitor Types
          1. 7.2.1.1.1 Recommended Capacitors (Legacy Chip)
            1. 7.2.1.1.1.1 ESR Range (Legacy Chip)
          2. 7.2.1.1.2 Recommended Capacitors (New Chip)
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Feedback Resistor Selection
        2. 7.2.2.2 Feedforward Capacitor
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

8.1.2 Device Nomenclature

Table 8-1 Device Nomenclature
PRODUCT(1) VOUT

LP2951xxQyyyzQ1

 xx is the nominal output voltage (for example, 50 = 5.0V, 33 = 3.3V).
Q indicates that this device is a grade-1 device in accordance with the AEC-Q100 standard.
yyy is the package designator.
z is the package quantity.
Q1 indicates that this device is an automotive grade (AEC-Q100) device.
This device can be configured to have both adjustable or fixed output.
Devices ship with either the legacy chip (CSO: SHE) or the new chip (CSO: RFB). The reel packaging label provides the CSO information to distinguish which chip is being used. Device performance for new and legacy chips is denoted throughout the document.

LP2951xxQyyyzM3Q1

 xx is the nominal output voltage (for example, 50 = 5.0V, 33 = 3.3V).
Q indicates that this device is a grade-1 device in accordance with the AEC-Q100 standard.
yyy is the package designator.
z is the package quantity.
M3 indicates that this device only ships with the new chip.
Q1 indicates that this device is an automotive grade (AEC-Q100) device.
This device can be configured to have both adjustable or fixed output..
LP2951xxADJQyyyzQ1 xx is the nominal output voltage (for example, 50 = 5.0V, 33 = 3.3V).
Q indicates that this device is a grade-1 device in accordance with the AEC-Q100 standard.
ADJ indicates that this device only ships with the new chip and retains legacy chip internal reference (VREF) limits in adjustable configuration.yyy is the package designator.
z is the package quantity.
Q1 indicates that this device is an automotive grade (AEC-Q100) device.
This device can be configured to have both adjustable or fixed output.
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com.