SLVSE03B April   2019  – February 2021 TPS929120-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Device Bias and Power
        1. 7.3.1.1 Power Supply (SUPPLY)
        2. 7.3.1.2 5-V Low-Drop-Out Linear Regulator (VLDO)
        3. 7.3.1.3 Undervoltage Lockout (UVLO) and Power-On-Reset (POR)
        4. 7.3.1.4 Programmable Low Supply Warning
      2. 7.3.2 Constant Current Output
        1. 7.3.2.1 Reference Current With External Resistor (REF)
        2. 7.3.2.2 64-Step Programmable High-Side Constant-Current Output
      3. 7.3.3 PWM Dimming
        1. 7.3.3.1 PWM Dimming Frequency
        2. 7.3.3.2 PWM Generator
        3. 7.3.3.3 Linear Brightness Control
        4. 7.3.3.4 Exponential Brightness Control
        5. 7.3.3.5 External Clock Input for PWM Generator (CLK)
        6. 7.3.3.6 External PWM Input ( PWM0 and PWM1)
      4. 7.3.4 On-chip 8-bit Analog-to-Digital Converter (ADC)
      5. 7.3.5 Diagnostic and Protection in Normal State
        1. 7.3.5.1  Fault Masking
        2. 7.3.5.2  Supply Undervoltage Lockout Diagnostics in Normal State
        3. 7.3.5.3  Low-Supply Warning Diagnostics in Normal State
        4. 7.3.5.4  Reference Diagnostics in Normal State
        5. 7.3.5.5  Pre-Thermal Warning and Overtemperature Protection in Normal State
        6. 7.3.5.6  Communication Loss Diagnostic in Normal State
        7. 7.3.5.7  LED Open-Circuit Diagnostics in Normal State
        8. 7.3.5.8  LED Short-circuit Diagnostics in Normal State
        9. 7.3.5.9  On-Demand Off-State Invisible Diagnostics
        10. 7.3.5.10 On-Demand Off-State Single-LED Short-Circuit (SS) Diagnostics
        11. 7.3.5.11 Automatic Single-LED Short-Circuit (AutoSS) Detection in Normal State
        12. 7.3.5.12 EEPROM CRC Error in Normal State
        13.       47
      6. 7.3.6 Diagnostic and Protection in Fail-Safe States
        1. 7.3.6.1 Fault Masking
        2. 7.3.6.2 Supply UVLO Diagnostics in Fail-Safe States
        3. 7.3.6.3 Low-supply Warning Diagnostics in Fail-Safe states
        4. 7.3.6.4 Reference Diagnostics at Fail-Safe States
        5. 7.3.6.5 Overtemperature Protection in Fail-Safe State
        6. 7.3.6.6 LED Open-circuit Diagnostics in Fail-Safe State
        7. 7.3.6.7 LED Short-circuit Diagnostics in Fail-safe State
        8. 7.3.6.8 EEPROM CRC Error in Fail-safe State
        9.       57
    4. 7.4 Device Functional Modes
      1. 7.4.1 POR State
      2. 7.4.2 Initialization State
      3. 7.4.3 Normal State
      4. 7.4.4 Fail-Safe States
      5. 7.4.5 Program State
      6. 7.4.6 Programmable Output Failure State
      7. 7.4.7 ERR Output
      8. 7.4.8 Register Default Data
    5. 7.5 Programming
      1. 7.5.1 FlexWire Protocol
        1. 7.5.1.1 Protocol Overview
        2. 7.5.1.2 UART Interface Address Setting
        3. 7.5.1.3 Status Response
        4. 7.5.1.4 Synchronization Byte
        5. 7.5.1.5 Device Address Byte
        6. 7.5.1.6 Register Address Byte
        7. 7.5.1.7 Data Frame
        8.       76
        9. 7.5.1.8 CRC Frame
        10. 7.5.1.9 Burst Mode
      2. 7.5.2 Registers Lock
      3. 7.5.3 All Registers CRC Check
      4. 7.5.4 EEPROM Programming
        1. 7.5.4.1 Chip Selection by Pulling REF Pin High
        2. 7.5.4.2 Chip Selection by ADDR Pins configuration
        3. 7.5.4.3 EEPROM Register Access and Burn
        4. 7.5.4.4 EEPROM Program State Exit
        5. 7.5.4.5 Reading Back EEPROM
    6. 7.6 Register Maps
      1. 7.6.1 FullMap Registers
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Smart Rear Lamp With Distributed LED drivers
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
      4. 8.2.4 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

7.6 Register Maps

CAUTION:

All the RESERVED bits in register and EEPROM are set to 0b in TI manufacture. All the RESERVED bits in both register and EEPROM must be written to 0b in case of unavoidable register and EEPROM writing.

Table 7-12 Register Map
ADDR NAME BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0 DEFAULT
00h IOUT0 RESERVED RESERVED CONF_IOUT0 EEPI0
01h IOUT1 RESERVED RESERVED CONF_IOUT1 EEPI1
02h IOUT2 RESERVED RESERVED CONF_IOUT2 EEPI2
03h IOUT3 RESERVED RESERVED CONF_IOUT3 EEPI3
04h IOUT4 RESERVED RESERVED CONF_IOUT4 EEPI4
05h IOUT5 RESERVED RESERVED CONF_IOUT5 EEPI5
06h IOUT6 RESERVED RESERVED CONF_IOUT6 EEPI6
07h IOUT7 RESERVED RESERVED CONF_IOUT7 EEPI7
08h IOUT8 RESERVED RESERVED CONF_IOUT8 EEPI8
09h IOUT9 RESERVED RESERVED CONF_IOUT9 EEPI9
0Ah IOUT10 RESERVED RESERVED CONF_IOUT10 EEPI10
0Bh IOUT11 RESERVED RESERVED CONF_IOUT11 EEPI11
20h PWM0 CONF_PWMOUT0 EEPP0
21h PWM1 CONF_PWMOUT1 EEPP1
22h PWM2 CONF_PWMOUT2 EEPP2
23h PWM3 CONF_PWMOUT3 EEPP3
24h PWM4 CONF_PWMOUT4 EEPP4
25h PWM5 CONF_PWMOUT5 EEPP5
26h PWM6 CONF_PWMOUT6 EEPP6
27h PWM7 CONF_PWMOUT7 EEPP7
28h PWM8 CONF_PWMOUT8 EEPP8
29h PWM9 CONF_PWMOUT9 EEPP9
2Ah PWM10 CONF_PWMOUT10 EEPP10
2Bh PWM11 CONF_PWMOUT11 EEPP11
40h PWML0 RESERVED RESERVED RESERVED RESERVED CONF_PWMLOWOUT0 0Fh
41h PWML1 RESERVED RESERVED RESERVED RESERVED CONF_PWMLOWOUT1 0Fh
42h PWML2 RESERVED RESERVED RESERVED RESERVED CONF_PWMLOWOUT2 0Fh
43h PWML3 RESERVED RESERVED RESERVED RESERVED CONF_PWMLOWOUT3 0Fh
44h PWML4 RESERVED RESERVED RESERVED RESERVED CONF_PWMLOWOUT4 0Fh
45h PWML5 RESERVED RESERVED RESERVED RESERVED CONF_PWMLOWOUT5 0Fh
46h PWML6 RESERVED RESERVED RESERVED RESERVED CONF_PWMLOWOUT6 0Fh
47h PWML7 RESERVED RESERVED RESERVED RESERVED CONF_PWMLOWOUT7 0Fh
48h PWML8 RESERVED RESERVED RESERVED RESERVED CONF_PWMLOWOUT8 0Fh
49h PWML9 RESERVED RESERVED RESERVED RESERVED CONF_PWMLOWOUT9 0Fh
4Ah PWML10 RESERVED RESERVED RESERVED RESERVED CONF_PWMLOWOUT10 0Fh
4Bh PWML11 RESERVED RESERVED RESERVED RESERVED CONF_PWMLOWOUT11 0Fh
50h CONF_EN0 CONF_ENCH7 CONF_ENCH6 CONF_ENCH5 CONF_ENCH4 CONF_ENCH3 CONF_ENCH2 CONF_ENCH1 CONF_ENCH0 00h
51h CONF_EN1 RESERVED RESERVED RESERVED RESERVED CONF_ENCH11 CONF_ENCH10 CONF_ENCH9 CONF_ENCH8 00h
54h CONF_DIAGEN0 CONF_DIAGENCH7 CONF_DIAGENCH6 CONF_DIAGENCH5 CONF_DIAGENCH4 CONF_DIAGENCH3 CONF_DIAGENCH2 CONF_DIAGENCH1 CONF_DIAGENCH0 EEPM4
55h CONF_DIAGEN1 RESERVED RESERVED RESERVED RESERVED CONF_DIAGENCH11 CONF_DIAGENCH10 CONF_DIAGENCH9 CONF_DIAGENCH8 EEPM5
56h CONF_MISC0 CONF_AUTOSS CONF_LDO RESERVED CONF_EXPEN RESERVED RESERVED RESERVED RESERVED EEPM6
57h CONF_MISC1 CONF_PWMFREQ RESERVED RESERVED CONF_REFRANGE EEPM7
58h CONF_MISC2 RESERVED CONF_FLTIMEOUT CONF_ADCLOWSUPTH EEPM8
59h CONF_MISC3 CONF_ODIOUT CONF_ODPW EEPM9
5Ah CONF_MISC4 CONF_WDTIMER RESERVED RESERVED RESERVED RESERVED EEPM10
5Bh CONF_MISC5 CONF_ADCSHORTTH EEPM11
60h CLR RESERVED RESERVED CONF_FORCEFS CLR_REG CONF_FORCEERR CLR_FS CLR_FAULT CLR_POR 00h
61h CONF_LOCK RESERVED RESERVED RESERVED RESERVED CONF_CLRLOCK CONF_CONFLOCK CONF_IOUTLOCK CONF_PWMLOCK 0Fh
62h CONF_MISC6 CONF_STAYINEEP CONF_EEPREADBACK RESERVED CONF_ADCCH 00h
63h CONF_MISC7 CONF_EXTCLK CONF_SHAREPWM CONF_READSHADOW CONF_EEPMODE 00h
64h CONF_MISC8 CONF_MASKREF CONF_MASKCRC CONF_MASKOPEN CONF_MASKSHORT CONF_MASKTSD CONF_EEPPROG CONF_SSSTART CONF_INVDIAGSTART 00h
65h CONF_MISC9 CONF_EEPGATE 00h
70h FLAG0 RESERVED FLAG_REF FLAG_FS FLAG_OUT FLAG_PRETSD FLAG_TSD FLAG_POR FLAG_ERR 03h
71h FLAG1 RESERVED RESERVED FLAG_EXTFS FLAG_PROGREADY FLAG_ADCLOWSUP FLAG_ADCDONE FLAG_ODREADY FLAG_EEPCRC X
72h FLAG2 ADC_SUPPLY X
73h FLAG3 ADC_OUT 00h
74h FLAG4 FLAG_ODDIAGCH7 FLAG_ODDIAGCH6 FLAG_ODDIAGCH5 FLAG_ODDIAGCH4 FLAG_ODDIAGCH3 FLAG_ODDIAGCH2 FLAG_ODDIAGCH1 FLAG_ODDIAGCH0 00h
75h FLAG5 RESERVED RESERVED RESERVED RESERVED FLAG_ODDIAGCH11 FLAG_ODDIAGCH10 FLAG_ODDIAGCH9 FLAG_ODDIAGCH8 00h
77h FLAG7 CALC_EEPCRC B3h(1)
78h FLAG8 CALC_CONFCRC X
7Bh FLAG11 FLAG_OPENCH7 FLAG_OPENCH6 FLAG_OPENCH5 FLAG_OPENCH4 FLAG_OPENCH3 FLAG_OPENCH2 FLAG_OPENCH1 FLAG_OPENCH0 00h
7Ch FLAG12 RESERVED RESERVED RESERVED RESERVED FLAG_OPENCH11 FLAG_OPENCH10 FLAG_OPENCH9 FLAG_OPENCH8 00h
7Dh FLAG13 FLAG_SHORTCH7 FLAG_SHORTCH6 FLAG_SHORTCH5 FLAG_SHORTCH4 FLAG_SHORTCH3 FLAG_SHORTCH2 FLAG_SHORTCH1 FLAG_SHORTCH0 00h
7Eh FLAG14 RESERVED RESERVED RESERVED RESERVED FLAG_SHORTCH11 FLAG_SHORTCH10 FLAG_SHORTCH9 FLAG_SHORTCH8 00h
(1) For TPS929120A version, the default value of register FLAG7 is 09h.
Table 7-13 EEPROM Map
ADDR NAME BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0 DEFAULT
80h EEPI0 RESERVED RESERVED EEP_IOUT0 3Fh
81h EEPI1 RESERVED RESERVED EEP_IOUT1 3Fh
82h EEPI2 RESERVED RESERVED EEP_IOUT2 3Fh
83h EEPI3 RESERVED RESERVED EEP_IOUT3 3Fh
84h EEPI4 RESERVED RESERVED EEP_IOUT4 3Fh
85h EEPI5 RESERVED RESERVED EEP_IOUT5 3Fh
86h EEPI6 RESERVED RESERVED EEP_IOUT6 3Fh
87h EEPI7 RESERVED RESERVED EEP_IOUT7 3Fh
88h EEPI8 RESERVED RESERVED EEP_IOUT8 3Fh
89h EEPI9 RESERVED RESERVED EEP_IOUT9 3Fh
8Ah EEPI10 RESERVED RESERVED EEP_IOUT10 3Fh
8Bh EEPI11 RESERVED RESERVED EEP_IOUT11 3Fh
A0h EEPP0 EEP_PWMOUT0 FFh
A1h EEPP1 EEP_PWMOUT1 FFh
A2h EEPP2 EEP_PWMOUT2 FFh
A3h EEPP3 EEP_PWMOUT3 FFh
A4h EEPP4 EEP_PWMOUT4 FFh
A5h EEPP5 EEP_PWMOUT5 FFh
A6h EEPP6 EEP_PWMOUT6 FFh
A7h EEPP7 EEP_PWMOUT7 FFh
A8h EEPP8 EEP_PWMOUT8 FFh
A9h EEPP9 EEP_PWMOUT9 FFh
AAh EEPP10 EEP_PWMOUT10 FFh
ABh EEPP11 EEP_PWMOUT11 FFh
C0h EEPM0 EEP_FS0CH7 EEP_FS0CH6 EEP_FS0CH5 EEP_FS0CH4 EEP_FS0CH3 EEP_FS0CH2 EEP_FS0CH1 EEP_FS0CH0 00h
C1h EEPM1 RESERVED RESERVED RESERVED RESERVED EEP_FS0CH11 EEP_FS0CH10 EEP_FS0CH9 EEP_FS0CH8 00h
C2h EEPM2 EEP_FS1CH7 EEP_FS1CH6 EEP_FS1CH5 EEP_FS1CH4 EEP_FS1CH3 EEP_FS1CH2 EEP_FS1CH1 EEP_FS1CH0 FFh
C3h EEPM3 RESERVED RESERVED RESERVED RESERVED EEP_FS1CH11 EEP_FS1CH10 EEP_FS1CH9 EEP_FS1CH8 0Fh
C4h EEPM4 EEP_DIAGENCH7 EEP_DIAGENCH6 EEP_DIAGENCH5 EEP_DIAGENCH4 EEP_DIAGENCH3 EEP_DIAGENCH2 EEP_DIAGENCH1 EEP_DIAGENCH0 FFh
C5h EEPM5 RESERVED RESERVED RESERVED RESERVED EEP_DIAGENCH11 EEP_DIAGENCH10 EEP_DIAGENCH9 EEP_DIAGENCH8 0Fh
C6h EEPM6 RESERVED EEP_LDO RESERVED EEP_EXPEN EEP_DEVADDR 00h(1)
C7h EEPM7 EEP_PWMFREQ EEP_INTADDR EEP_OFAF EEP_REFRANGE A7h
C8h EEPM8 RESERVED EEP_FLTIMEOUT EEP_ADCLOWSUPTH 03h
C9h EEPM9 EEP_ODIOUT EEP_ODPW 00h
CAh EEPM10 EEP_WDTIMER EEP_INITTIMER 00h
CBh EEPM11 EEP_ADCSHORTTH 00h
CCh EEPM12 RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED 00h
CDh EEMP13 RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED 00h
CEh EEMP14 RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED 00h
CFh EEPM15 EEP_CRC B3h(2)
(1) For TPS929120A version, the default value of EEPROM register EEPM6 is 08h.
(2) For TPS929120A version, the default value of EEPROM register EEPM15 is 09h.