SLVSHH7A January   2024  – June 2024 TPS56837H

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  The Adaptive On-Time Control and PWM Operation
      2. 6.3.2  Mode Selection
      3. 6.3.3  Eco-mode Control Scheme
      4. 6.3.4  Soft Start and Prebiased Soft Start
      5. 6.3.5  Enable and Adjusting Undervoltage Lockout
      6. 6.3.6  Output Overcurrent Limit and Undervoltage Protection
      7. 6.3.7  Overvoltage Protection
      8. 6.3.8  UVLO Protection
      9. 6.3.9  Thermal Shutdown
      10. 6.3.10 Output Voltage Discharge
      11. 6.3.11 Power Good
      12. 6.3.12 Large Duty Operation
    4. 6.4 Device Functional Modes
      1. 6.4.1 Standby Operation
      2. 6.4.2 Light Load Operation
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Output Voltage Resistors Selection
        2. 7.2.2.2 Output Filter Selection
        3. 7.2.2.3 Input Capacitor Selection
        4. 7.2.2.4 Bootstrap Capacitor Selection
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Tape and Reel Information

5.4 Thermal Information

THERMAL METRIC(1)

Device

UNIT
QFN HotRod
10 PINS
RθJA Junction-to-ambient thermal resistance (JEDEC)(2)68.1°C/W
Eff RθJAEffective junction-to-ambient thermal resistance (4-layer TI EVM)30°C/W
RθJC(top)Junction-to-case (top) thermal resistance40.4°C/W
RθJBJunction-to-board thermal resistance17.6°C/W
ΨJTJunction-to-top characterization parameter1.4°C/W
ΨJBJunction-to-board characterization parameter17.2°C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
(2) This junction-to-ambient thermal resistance (JEDEC) is based on JEDEC standard EVM without GND thermal vias.