SLVSI72A April 2025 – October 2025 TPS55285
PRODUCTION DATA
STATUS is shown in Figure 7-8 and described in Table 7-9.
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The STATUS register stores the operating status of the TPS55285. When any of the SCP bit, the OCP bit, the OVP bit or the TSD bit are set, and the corresponding mask bit in register 05h is set as well, the FB/INT pin outputs low logic level to indicate the situation. Reading register 07h clears the SCP bit, OCP bit, OVP bit and TSD bit. The FB/INT pin status and SCP bit, OCP bit, OVP bit or TSD bit are reset until the register 07h is read. If the fault situation still exists, the corresponding bit and FB/INT pin is set again.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| SCP | OCP | OVP | TSD | Reserved | Reserved | STATUS | |
| R-0b | R-0b | R-0b | R-0b | R-0b | R-0b | R-11b | |
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 7 | SCP | R | 0b | Short circuit protection 0b = No short circuit 1b = Short circuit happens. Does not reset until it is read. |
| 6 | OCP | R | 0b | Overcurrent protection 0b = No output overcurrent 1b = Output current hits the current limit. Does not reset until it is read. |
| 5 | OVP | R | 0b | Overvoltage protection 0b = No OVP 1b = Output voltage exceeds the OVP threshold. Does not reset until it is read. |
| 4 | TSD | R | 0b | Thermal shutdown protection 0b = No TSD 1b = Thermal shutdown happens. Does not reset until it is read |
| 3 | RESERVED | R | 0b | Reserved |
| 2 | RESERVED | R | 0b | Reserved |
| 1-0 | STATUS | R | 01b | Operating status 00b = Boost 01b = Buck 10b = Buck-Boost 11b = Reserved |