SLVSIJ6 October   2025 TPS61388-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  VCC Power Supply
      2. 7.3.2  Input Undervoltage Lockout (UVLO)
      3. 7.3.3  Enable and Soft Start
      4. 7.3.4  Shut Down
      5. 7.3.5  Switching Frequency Setting
      6. 7.3.6  Spread Spectrum Frequency Modulation
      7. 7.3.7  Bootstrap
      8. 7.3.8  MODE/SYNC Configuration
      9. 7.3.9  Pass-through Operation
        1. 7.3.9.1 Auto PFM Behavior
        2. 7.3.9.2 400kHz Forced PWM Behavior
        3. 7.3.9.3 2.2MHz Fixed Frequency Behavior with TPS61388-Q1
        4. 7.3.9.4 Special Limitation for FPWM 2.2MHz Fixed Frequency
        5. 7.3.9.5 2.2MHz Frequency Foldback Behavior with TPS613881-Q1
      10. 7.3.10 Overvoltage Protection (OVP)
      11. 7.3.11 Power-Good Indicator
      12. 7.3.12 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Forced PWM Mode
      2. 7.4.2 Auto PFM Mode
    5. 7.5 Pinout Design for Clearance and FMEA
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Programming the Output Voltage
        2. 8.2.2.2 Selecting the Inductor
        3. 8.2.2.3 Selecting the Output Capacitors
        4. 8.2.2.4 Selecting the Input Capacitors
        5. 8.2.2.5 Selecting the Bootstrap Capacitor
        6. 8.2.2.6 VCC Capacitor
        7. 8.2.2.7 Protect from Inrush Current
        8. 8.2.2.8 Loop Stability and Compensation
          1. 8.2.2.8.1 Small Signal Model
          2. 8.2.2.8.2 Loop Compensation Design Steps
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Glossary
    6. 9.6 Electrostatic Discharge Caution
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

7.4.2 Auto PFM Mode

The TPS61388-Q1 enters Auto PFM Mode by pulling the MODE/SYNC pin to logic low for more than five switching cycles. The TPS61388-Q1 improves the efficiency at light load when operating in Auto PFM mode. When the output current decreases to a certain level, the output voltage of the error amplifier is clamped by the internal circuit. If the output current reduces further, the inductor current through the high-side switch will be clamped but not lowered further. Pulses are skipped to improve the efficiency at light load.