The inputs of the UCC5713x device are compatible with TTL-based threshold logic and the inputs are independent of the VDD supply voltage. Wider hysteresis (typically 1V) offers enhanced noise immunity compared to traditional TTL logic implementations. This device also features tight control of the input pin threshold voltage levels, which eases system design considerations and establishes stable operation across temperature.

The device features an important protection function wherein, whenever the input pin is in a floating condition, the output is held in the low state. This is achieved with internal pulldown resistors on the input pins, as shown in the simplified functional block diagram. In some applications, due to differences in bias supply sequencing, different ICs power-up at different times. This can cause the controller output to be in tri-state. This controller output gets connected to the input of the driver IC. If the driver IC does not have a pulldown resistor then the output of the driver can go high erroneously and damage the switching power device.

The input stage of the driver must preferably be driven by a signal with a short rise or fall time. Exercise caution whenever using the driver with slowly varying input signals, especially in situations where the device is located in a separate daughterboard or if the PCB layout has long input connection traces:

• High di/dt current from the driver output coupled with board layout parasitics can cause ground bounce. The device's single COM pin can be referenced to the power ground, which can interfere with the differential voltage between the input pins and COM and trigger an unintended change of output state. Because of fast 26ns propagation delay, this can ultimately result in high-frequency oscillations, increasing power dissipation and risk of damage.
• 1V input threshold hysteresis boosts noise immunity compared to most other industry-standard drivers.

An external resistor is highly recommended between the driver output and the power device, instead of adding delays on the input signal. This also limits the rise or fall times to the power device, reducing EMI. The external resistor has the additional benefit of reducing part of the gate charge-related power dissipation in the gate driver device package and transferring it into the external resistor.

Finally, because of the unique input structure that allows negative voltage capability on the input, use caution and limit input pin slew rates less than 1V/ns.