SLVSJP9 August   2025 SN74LV8T540-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4.   4
  5. 3 Description
  6. 4 Pin Configuration and Functions
  7. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Noise Characteristics
    8. 5.8 Typical Characteristics
  8. 6 Parameter Measurement Information
  9. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Balanced CMOS 3-State Outputs
      2. 7.3.2 LVxT Enhanced Input Voltage
        1. 7.3.2.1 Up Translation
        2. 7.3.2.2 Down Translation
      3. 7.3.3 Wettable Flanks
      4. 7.3.4 Clamp Diode Structure
    4. 7.4 Device Functional Modes
  10. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Typical Application
        1. 8.1.1.1 Design Requirements
          1. 8.1.1.1.1 Power Considerations
          2. 8.1.1.1.2 Input Considerations
          3. 8.1.1.1.3 Output Considerations
        2. 8.1.1.2 Detailed Design Procedure
        3. 8.1.1.3 Application Curves
    2. 8.2 Power Supply Recommendations
    3. 8.3 Layout
      1. 8.3.1 Layout Guidelines
      2. 8.3.2 Layout Example
  11. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  12. 10Revision History
  13. 11Mechanical, Packaging, and Orderable Information

5.6 Switching Characteristics

Over operating free-air temperature range; typical values measured at TA = 25°C (unless otherwise noted). See Parameter Measurement Information.
PARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE VCC -40°C to 125°C UNIT
MIN TYP MAX
tPLH A Y CL = 15pF 1.8V 5.4 8.5 12.1 ns
tPHL 6.6 10.9 15.8 ns
tPZH OE Y CL = 15pF 1.8V 8.8 14.4 20.9 ns
tPZL 7.9 13.3 19.4 ns
tPHZ OE Y CL = 15pF 1.8V 7 9.9 13.6 ns
tPLZ 7 9.1 11.7 ns
tPLH A Y CL = 50pF 1.8V 7.3 11.5 16.5 ns
tPHL 8.4 13.6 19.7 ns
tPZH OE Y CL = 50pF 1.8V 11.1 17.8 25.6 ns
tPZL 10.1 16.3 23.6 ns
tPHZ OE Y CL = 50pF 1.8V 13.4 16.5 20.4 ns
tPLZ 13.4 15.6 18.4 ns
tsk(o) CL = 50pF 1.8V 0.2 0.3 ns
tPLH A Y CL = 15pF 2.5V 3.8 5.6 7.9 ns
tPHL 4.8 7.2 10.1 ns
tPZH OE Y CL = 15pF 2.5V 6.3 9.4 13.3 ns
tPZL 5.6 8.5 12.2 ns
tPHZ OE Y CL = 15pF 2.5V 4.8 6.6 8.9 ns
tPLZ 5.2 6.4 8 ns
tPLH A Y CL = 50pF 2.5V 5.2 7.7 10.9 ns
tPHL 6.2 9.1 12.9 ns
tPZH OE Y CL = 50pF 2.5V 8.1 11.9 16.6 ns
tPZL 7.5 10.9 15.3 ns
tPHZ OE Y CL = 50pF 2.5V 9.1 11 13.4 ns
tPLZ 9.5 10.8 12.5 ns
tsk(o) CL = 50pF 2.5V 0.2 0.3 ns
tPLH A Y CL = 15pF 3.3V 3.4 4.8 6.6 ns
tPHL 4.2 6 8.5 ns
tPZH OE Y CL = 15pF 3.3V 5.6 7.9 10.8 ns
tPZL 4.9 7.1 10 ns
tPHZ OE Y CL = 15pF 3.3V 3.6 5.1 7.1 ns
tPLZ 4.5 5.5 6.8 ns
tPLH A Y CL = 50pF 3.3V 4.5 6.5 9.1 ns
tPHL 5.5 7.8 10.8 ns
tPZH OE Y CL = 50pF 3.3V 7.2 10.1 13.7 ns
tPZL 6.6 9.2 12.7 ns
tPHZ OE Y CL = 50pF 3.3V 7.3 8.7 10.6 ns
tPLZ 8.2 9 10.3 ns
tsk(o) CL = 50pF 3.3V 0.1 0.2 ns
tPLH A Y CL = 15pF 5V 3.2 4.2 5.6 ns
tPHL 3.1 4.2 5.8 ns
tPZH OE Y CL = 15pF 5V 4.2 5.6 7.6 ns
tPZL 3.6 4.9 6.9 ns
tPHZ OE Y CL = 15pF 5V 3 4 5.3 ns
tPLZ 4.5 5.1 5.9 ns
tPLH A Y CL = 50pF 5V 4.1 5.5 7.4 ns
tPHL 4.2 5.6 7.7 ns
tPZH OE Y CL = 50pF 5V 5.4 7.4 9.9 ns
tPZL 5 6.7 9 ns
tPHZ OE Y CL = 50pF 5V 5.1 6 7.4 ns
tPLZ 6.8 7.3 8.1 ns
tsk(o) CL = 50pF 5V 0.1 0.2 ns