SLVSLP9 March   2026 SN74LVC240A-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5.   5
  6. Pin Configuration and Functions
  7. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Balanced CMOS 3-State Outputs
      2. 7.3.2 Partial Power Down (Ioff)
      3. 7.3.3 Standard CMOS Inputs
      4. 7.3.4 Clamp Diode Structure
    4. 7.4 Device Functional Modes
  10. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Power Considerations
        2. 8.2.1.2 Input Considerations
        3. 8.2.1.3 Output Considerations
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  11. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  12. 10Revision History
  13. 11Mechanical, Packaging, and Orderable Information

Pin Configuration and Functions

SN74LVC240A-Q1 SN74LVC240A-Q1
            RKS Package (Top View)Figure 4-1 SN74LVC240A-Q1 RKS Package (Top View)
SN74LVC240A-Q1 SN74LVC240A-Q1
            PW, DGS Package (Top
            View)Figure 4-2 SN74LVC240A-Q1 PW, DGS Package
(Top View)
Pin Functions
PIN TYPE(1) DESCRIPTION
NAME NO.
A1 2 I Bank 1, channel 1 input
A2 3 O Bank 2, channel 4 output
A3 4 I Bank 1, channel 2 input
A4 5 O Bank 2, channel 3 output
A5 6 I Bank 1, channel 3 input
A6 7 O Bank 2, channel 2 output
A7 8 I Bank 1, channel 4 input
A8 9 O Bank 2, channel 1 output
GND 10 G Ground
OE1 1 I Bank 1, output enable, active low
OE2 19 I Bank 2, output enable, active low
Thermal Pad(2) The thermal pad can be connected to GND or left floating. Do not connect to any other signal or supply.
VCC 20 P Positive supply
Y1 18 O Bank 1, channel 1 output
Y2 17 I Bank 2, channel 4 input
Y3 16 O Bank 1, channel 2 output
Y4 15 I Bank 2, channel 3 input
Y5 14 O Bank 1, channel 3 output
Y6 13 I Bank 2, channel 2 input
Y7 12 O Bank 1, channel 4 output
Y8 11 I Bank 2, channel 1 input
Signal Types: I = Input, O = Output, G = Ground, P = Power.
RKS package only.