SLVU479A October   2011  – August 2021 TPS54821

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Background
    2. 1.2 Performance Specification Summary
    3. 1.3 Modifications
      1. 1.3.1 Output Voltage Setpoint
      2. 1.3.2 Slow-Start Time
      3. 1.3.3 Track In
      4. 1.3.4 Adjustable UVLO
      5. 1.3.5 Input Voltage Rails
  3. 2Test Setup and Results
    1. 2.1  Input/Output Connections
    2. 2.2  Efficiency
    3. 2.3  Output Voltage Load Regulation
    4. 2.4  Output Voltage Line Regulation
    5. 2.5  Load Transients
    6. 2.6  Loop Characteristics
    7. 2.7  Output Voltage Ripple
    8. 2.8  Input Voltage Ripple
    9. 2.9  Powering Up
    10. 2.10 Pre-Bias Start-Up
    11. 2.11 Hiccup-Mode Current Limit
  4. 3Board Layout
    1. 3.1 Layout
  5. 4Schematic and Bill of Materials
    1. 4.1 Schematic
    2. 4.2 Bill of Materials
  6. 5Revision History

2.1 Input/Output Connections

The TPS54821EVM-049 is provided with input/output connectors and test points as shown in Table 2-1. A power supply capable of supplying 4 A must be connected to J1 through a pair of 20 AWG wires. The jumper across JP1 must be in place. See Section 1.3.5 for split-input voltage rail operation. The load must be connected to J4 through a pair of 20 AWG wires. The maximum load current capability must be 8 A. Wire lengths must be minimized to reduce losses in the wires. Test-point TP1 provides a place to monitor the VIN input voltages with TP2 providing a convenient ground reference. TP9 is used to monitor the output voltage with TP10 as the ground reference.

Table 2-1 EVM Connectors and Test Points
REFERENCE DESIGNATORFunction
J1PVIN input voltage connector. (See Table 1-1 for VIN range.)
J2VIN input voltage connector. Not normally used.
J32-pin header for tracking voltage input and ground
J4VOUT, 3.3 V at 8-A maximum
J52-pin header for tracking output and ground
JP1PVIN to VIN jumper. Normally closed to tie VIN to PVIN for common rail voltage operation.
JP22-pin header for enable. Connect EN to ground to disable, open to enable.
TP1PVIN test point at PVIN connector
TP2GND test point at PVIN connector
TP3VIN test point at VIN connector
TP4GND test point at VIN connector
TP5Test point provided to connect external voltage source for PWRGD pullup.
TP6PWRGD test point
TP7PH test point
TP8Test point between voltage divider network and output. Used for loop response measurements.
TP9Output voltage test point at VOUT connector
TP10GND test point at VOUT connector