SLVUB46A April   2017  – August 2021 TPS561208

 

  1.   Trademarks
  2. 1Introduction
  3. 2Performance Specification Summary
  4. 3Modifications
    1. 3.1 Output Voltage Setpoint
  5. 4Test Setup and Results
    1. 4.1  Input/Output Connections
    2. 4.2  Start-Up Procedure
    3. 4.3  Efficiency
    4. 4.4  Load Regulation
    5. 4.5  Line Regulation
    6. 4.6  Load Transient Response
    7. 4.7  Output Voltage Ripple
    8. 4.8  Input Voltage Ripple
    9. 4.9  Start-Up
    10. 4.10 Shut-Down
  6. 5Board Layout
    1. 5.1 Layout
  7. 6Schematic, Bill of Materials, and Reference
    1. 6.1 Schematic
    2. 6.2 Bill of Materials
    3. 6.3 Reference
  8. 7Revision History

Introduction

The TPS561208 is a single, adaptive on-time, D-CAP2™ mode, synchronous buck converter requiring a very low external component count. The D-CAP2 control circuit is optimized for low-ESR output capacitors such as POSCAP, SP-CAP, or ceramic types and features fast transient response with no external compensation. The switching frequency is internally set at a nominal 580 kHz. The high-side and low-side switching MOSFETs are incorporated inside the TPS561208 package along with the gate-drive circuitry. The low drain-to-source on resistance of the MOSFETs allows the TPS561208 to achieve high efficiencies and helps keep the junction temperature low at high output currents. The TPS561208 dc/dc synchronous converter is designed to provide up to a 1-A output from an input voltage source of 4.5 V to 17 V. The output voltage range is from 0.768 V to 7 V. Rated input voltage and output current ranges for the evaluation module are given in Table 1-1.

The TPS561208EVM-896 evaluation module (EVM) is a single, synchronous buck converter providing 1.05 V at 1 A from 4.5-V to 17-V input. This user’s guide describes the TPS561208EVM-896 performance.

Table 1-1 Input Voltage and Output Current Summary
EVMInput Voltage (VIN) RangeOutput Current (IOUT) Range
TPS561208EVM-8964.5 V to 17 V0 A to 1 A