SLVUCD1A May   2022  – September 2024 TPS65219 , TPS65219-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Caution
  5. 2Introduction
  6. 3Requirements
    1. 3.1 Hardware
    2. 3.2 Software
  7. 4TPS65219 Resources Overview
  8. 5EVM Configuration
    1. 5.1 Default EVM Configuration
    2. 5.2 Configuration Headers
    3. 5.3 Test Points
  9. 6Graphical User Interface (GUI)
    1. 6.1 Getting Started
      1. 6.1.1 Finding the GUI
      2. 6.1.2 Downloading the Required Software
      3. 6.1.3 Launching the GUI
      4. 6.1.4 Connecting to the EVM
    2. 6.2 Collateral Page
    3. 6.3 Register Map Page
    4. 6.4 NVM Configuration Page
      1. 6.4.1 NVM Fields
      2. 6.4.2 Create and Load a Custom Configuration
    5. 6.5 Sequence Configuration
    6. 6.6 NVM Programming Page
    7. 6.7 Additional Features
  10. 7Schematics, PCB Layouts, and Bill of Materials
    1. 7.1 TPS65219EVM Schematic
    2. 7.2 TPS65219EVM PCB Layers
    3. 7.3 TPS65219EVM Bill of Materials
  11. 8Revision History

5.3 Test Points

The TPS65219EVM EVM contains multiple test points for various measurements. Trace assignments to the test points are shown in the table below.

Table 5-3 TPS65219 EVM Test Points
Test Point Associated Trace
TP1 VSEL_SD/VSEL_DDR
TP2 GND
TP3 VSYS
TP4-5 GND
TP6 VDD1P8
TP7-10 GND
TP11 MODE/STBY
TP12 GND
TP13 GND
TP14 PB / EN
TP15 Buck 1 Output SENSE
TP16 Buck 2 Output SENSE
TP17 Buck 3 Output SENSE
TP18 LDO 1 Output SENSE
TP19 LDO 2 Output SENSE
TP20 LDO 3 Output SENSE
TP21 LDO 4 Output SENSE
TP22 MODE/RST
TP23 Buck 1 Output
TP24 Buck 2 Output
TP25 Buck 3 Output
TP26 LDO 1 Output
TP27 LDO 2 Output
TP28 LDO 3 Output
TP29 LDO 4 Output
TP30-36 GND
TP37 GPIO
TP38 GPO1
TP39 GPO2
TP40 nINT
TP41 nRSTOUT
TP42 SDA
TP43 USB_5V
TP44 GND
TP45 SCL
TP46 MCU3V3