Startup Tests

When V_ON < V_IL, the device connects a Smart Pull Down (typically 491 kOhms) to the ON pin to prevent it from floating until system sequencing is complete. Once V_ON is driven > V_IH, the Smart Pull Down is disconnected.

By default, the ON pin is tied to V_IN on the EVM via R2 so that the user can utilize the jumpers (JP2 or JP7) without leaving the ON pin floating. If the jumpers are not being utilized, it is typically recommended to remove R2 and enable the device by applying an external signal to the ON pin via J6 or TP5 once V_IN is HIGH for cleaner startup.

Figure 3-1 Test Conditions: ON tied to VIN, I_OUT = 2A

Figure 3-1 Startup

Figure 3-2 Test Conditions: External signal applied to ON, I_OUT = 2A

Figure 3-2 ON - Low to High

Shutdown Tests

Figure 3-3 Test Conditions: ON tied to VIN, I_OUT = 2A

Figure 3-3 Shutdown

Figure 3-4 Test Conditions: External signal applied to ON, I_OUT = 2A

Figure 3-4 ON - High to Low

Quick Output Discharge (QOD) Tests

The Quick Output Discharge (QOD) feature of the TPS7H2221-SEP is controlled by the voltage sensed at the ON pin. When V_ON > V_IH, V_OUT follows V_IN. When V_ON < V_IL, the output is discharged to GND via the QOD pin and R_QOD (if desired). If the QOD pin is left open, then V_OUT will be left floating when V_ON < V_IL and it will discharge through the load or board parasitics.

In the Shutdown Tests section above, the scope shots show the difference in V_OUT behavior when V_ON is tied to V_IN versus when it is set LOW using an external signal. In the first case, V_OUT simply follows V_IN as it falls because V_ON > V_IH. In the second case, V_OUT is quickly discharged by the load and QOD because V_ON < V_IL, which is preferred.

The results shown in this section focus on configurations where I_OUT = 0A so that the impact of different QOD resistances on V_OUT fall time can be more easily observed. If a higher load is present, it will typically be the dominant factor in V_OUT fall time.

To calculate V_OUT fall time for devices in parallel configuration, the total R_QOD will be R_QOD1 || R_QOD2 and the total C_OUT will be C_OUT1 + C_OUT2.

Figure 3-5 Test Conditions: External signal applied to ON, I_OUT = 0A, all QOD jumpers left open

Figure 3-5 V_OUT Fall Time: R_QOD=OPEN

Figure 3-6 Test Conditions: External signal applied to ON, I_OUT = 0A, JP4 and JP9 shunted

Figure 3-6 V_OUT Fall Time: R_QOD=1 kOhms

Figure 3-7 Test Conditions: External signal applied to ON, I_OUT = 0A, JP5 and JP10 shunted

Figure 3-7 V_OUT Fall Time: R_QOD=500 Ohms

Figure 3-8 Test Conditions: External signal applied to ON, I_OUT = 0A, JP3 and JP8 shunted

Figure 3-8 V_OUT Fall Time: QOD tied to V_OUT