SLVUCF5A March   2022  – August 2022 DRV8329

 

  1.   Abstract
  2.   Trademarks
  3. 1Cautions and Warnings
  4. 2Introduction
  5. 3Quick Start Guide
  6. 4Hardware and Software Overview
    1. 4.1 Hardware Connections Overview – DRV8329AEVM + LAUNCHXL-F280049C
    2. 4.2 Connection Details
    3. 4.3 LED Lights
    4. 4.4 DRV8329AEVM Configurability
      1. 4.4.1 DRV8329A/B Compatibility
    5. 4.5 Interfacing DRV8329AEVM and LAUNCHXL-F280049C LaunchPad
  7. 5Hardware Setup
  8. 6Firmware and GUI Application
    1. 6.1 Connecting to the DRV8329AEVM-GUI
    2. 6.2 DRV8329x EVM GUI Quick Start Guide
    3. 6.3 Using the DRV8329x EVM GUI
  9. 7Schematics
    1. 7.1 DRV8329A/B
    2. 7.2 Status LEDs
    3. 7.3 LaunchPad Connectors and Connections
    4. 7.4 Power Stage and MOSFETs
    5. 7.5 Main Supply Input
    6. 7.6 Hall Sensor and Hall Power selection
    7. 7.7 Connectors, Selectors, and Analog Control Interface
    8. 7.8 Dead Time and CSA Gain Selection
    9. 7.9 Voltage Sense and Protection
  10. 8Revision History

4.5 Interfacing DRV8329AEVM and LAUNCHXL-F280049C LaunchPad

The DRV8329AEVM has 40 pins with different functions. These pins are interfaced with the LAUNCHXL-F280049C LaunchPad development kit and are mapped appropriately to receive the functionalities of the DRV8329 device. These 40 pins are grouped into 4 ports in respect to the LAUNCHXL-F280049C (J1 to J4). Table 4-3 and Table 4-4 list the interfacing of these ports of the DRV8329AEVM headers J3 and J4.

Table 4-3 Connections for Header J1 on DRV8329AEVM (DNP in bold)

J3 Pin Number

DRV8329AEVM Function

LAUNCHXL-F280049C Function

Description

1

AVDD (DNP)

+3.3 V

3.3 V LaunchPad Supply

2

+5 V

+5 V

5 V LaunchPad Supply

3

POT_MCU/NC_49C

PGA1/3/5_GND

Not used

4

GND

GND

GND connection

5

Not used

GPIO13/SCIBRX

Not used

6

VSENA

ADCINA5

Phase A Voltage Sense

7

Not used

GPIO40/SCIBTX

Not used

8

VSENB

ADCINB0

Phase B Voltage Sense

9

nSLEEP_DFLT

NC

nSLEEP for internal use only.

10

VSENC

ADCINC2

Phase C Voltage Sense

11

CTAP

ADCINB3/VDAC

Center tap voltage sense.

12

VSENPVDD

ADCINB1

PVDD Bus Voltage Sense

13

Not used

SPIACLK

Not used

14

NC_MCU/POT_49C

ADCINB2

General Purpose pot for MCU (R90)

15

nFAULT_DFLT

ADCINC4

nFAULT for internal use only.

16

ISENA

ADCINC0

LSS current sense

17

Not used

GPIO37

Not used

18

Not used

ADCINA9

Not used

19

Not used

GPIO35

Not used

20

VDSLVL/C_TAP

ADCINA1/DACB_OUT

VDSLVL from DAC. C_TAP for internal use only.
Table 4-4 Connections for Header J2 on DRV8329AEVM

J4 Pin Number

DRV8329AEVM Function

LAUNCHXL-F280049C Function

Description

1

INHA

GPIO10/PWM6A

PWM used to switch Phase A High-side FET

2

GND

GND

GND connection

3

INLA

GPIO11/PWM6B

PWM used to switch Phase A Low-side FET

4

MCU_LED

SPIASTE

Visual feedback for LaunchPad connection.

5

INHB

GPIO8/PWM5A

PWM used to switch Phase B High-side FET

6

nFAULT_DFLT

NC

nFAULT for internal use only.

7

INLB

GPIO9/PWM5B

PWM used to switch Phase B Low-side FET

8

Not used

NC

Not used

9

INHC

GPIO4/PWM3A

PWM used to switch Phase C High-side FET

10

Not used

XRSn

Not used

11

INLC

GPIO5/PWM3B

PWM used to switch Phase C Low-side FET

12

Not used

SPIASIMO

Not used

13

HALLA

GPIO58

Hall sensor A from motor

14

Not used

SPIASOMI

Not used

15

nSLEEP_49C

GPIO30

nSLEEP signal (active low)

16

DRVOFF

GPIO39

Active-high output to disable gate drivers

17

Not used

GPIO18*/XCLKOUT

Not used

18

HALLB

GPIO23/LED4

Hall sensor B from motor

19

nFAULT_49C/CSAREF

GPIO25

nFAULT signal (active low)

20

HALLC

GPIO59

Hall sensor C from motor
Note: There are many resistors that are not populated for internal use only. Ensure the correct resistors are populated so every has signal has only signal path. If multiple signal paths are present, or no signal path is present, the device may not work as intended.